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[DA] add testcases for bug llvm#148435 (llvm#154980)
Add regression tests from issue llvm#148435 .
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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5
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; RUN: opt < %s -disable-output "-passes=print<da>" 2>&1 | FileCheck %s
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define void @_Z1cb(ptr %a) {
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; CHECK-LABEL: '_Z1cb'
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; CHECK-NEXT: Src: store i8 0, ptr %arrayidx9, align 1 --> Dst: store i8 0, ptr %arrayidx9, align 1
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; CHECK-NEXT: da analyze - output [*]!
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;
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entry:
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br label %for.body
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for.cond.cleanup.loopexit: ; preds = %for.body
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ret void
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for.body: ; preds = %for.body, %entry
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%indvars.iv23 = phi i64 [ 0, %entry ], [ %indvars.iv.next24, %for.body ]
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%idxprom = and i64 %indvars.iv23, 1
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%arrayidx9 = getelementptr inbounds [0 x [12 x [12 x i8]]], ptr %a, i64 0, i64 %idxprom, i64 0, i64 %indvars.iv23
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store i8 0, ptr %arrayidx9, align 1
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%indvars.iv.next24 = add i64 %indvars.iv23, 1
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%exitcond.not = icmp eq i64 %indvars.iv.next24, 0
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br i1 %exitcond.not, label %for.cond.cleanup.loopexit, label %for.body
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}
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@a = external global [0 x [12 x [12 x i8]]], align 1
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define void @test_siv_no_addrec(i1 %d, i32 %b) {
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; CHECK-LABEL: 'test_siv_no_addrec'
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; CHECK-NEXT: Src: store i8 0, ptr %arrayidx7, align 1 --> Dst: store i8 0, ptr %arrayidx7, align 1
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; CHECK-NEXT: da analyze - output [* *]!
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;
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entry:
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%conv.val = select i1 %d, i16 1, i16 0
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br label %for.cond
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for.cond: ; preds = %for.inc8, %entry
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%e.0 = phi i32 [ %b, %entry ], [ %inc9, %for.inc8 ]
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%cmp = icmp ult i32 %e.0, 10
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br i1 %cmp, label %for.cond1, label %for.end10
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for.cond1: ; preds = %for.inc, %for.cond
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%f.0 = phi i16 [ %conv.val, %for.cond ], [ %add, %for.inc ]
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%cmp2 = icmp slt i16 %f.0, 10
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br i1 %cmp2, label %for.body4, label %for.inc8
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for.body4: ; preds = %for.cond1
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%sub = add i32 %e.0, -3
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%idxprom = zext i32 %sub to i64
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%idxprom5 = sext i16 %f.0 to i64
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%idxprom6 = zext i32 %e.0 to i64
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%arrayidx7 = getelementptr inbounds [0 x [12 x [12 x i8]]], ptr @a, i64 0, i64 %idxprom, i64 %idxprom5, i64 %idxprom6
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store i8 0, ptr %arrayidx7, align 1
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br label %for.inc
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for.inc: ; preds = %for.body4
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%add = add i16 %f.0, 2
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br label %for.cond1
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for.inc8: ; preds = %for.cond1
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%inc9 = add i32 %e.0, 1
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br label %for.cond
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for.end10: ; preds = %for.cond
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ret void
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}
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define void @f1(ptr %a) {
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; CHECK-LABEL: 'f1'
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; CHECK-NEXT: Src: store i8 0, ptr %idx, align 1 --> Dst: store i8 0, ptr %idx, align 1
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; CHECK-NEXT: da analyze - output [*]!
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;
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entry:
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br label %loop
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loop:
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%i = phi i64 [ 0, %entry ], [ %i.next, %loop ]
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%and = and i64 %i, 1
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%idx = getelementptr inbounds [4 x [4 x i8]], ptr %a, i64 0, i64 %and, i64 %and
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store i8 0, ptr %idx
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%i.next = add i64 %i, 1
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%exitcond.not = icmp slt i64 %i.next, 8
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br i1 %exitcond.not, label %loop, label %exit
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exit:
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ret void
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}
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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5
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; RUN: opt < %s -disable-output "-passes=print<da>" 2>&1 | FileCheck %s
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; Test case for SmallBitVector bounds checking bug in DependenceAnalysis.
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; This test ensures that loop index mapping functions don't cause out-of-bounds
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; access to SmallBitVector when loop depths exceed MaxLevels.
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define void @bounds_check_test(ptr %a) {
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; CHECK-LABEL: 'bounds_check_test'
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; CHECK-NEXT: Src: store i8 0, ptr %idx, align 1 --> Dst: store i8 0, ptr %idx, align 1
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; CHECK-NEXT: da analyze - output [*]!
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;
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entry:
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br label %loop
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loop:
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%i = phi i64 [ 0, %entry ], [ %i.next, %loop ]
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%and = and i64 %i, 1 ; Creates index 0 or 1
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%idx = getelementptr inbounds [4 x [4 x i8]], ptr %a, i64 0, i64 %and, i64 %i
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store i8 0, ptr %idx
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%i.next = add i64 %i, 1
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%exitcond.not = icmp slt i64 %i.next, 4
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br i1 %exitcond.not, label %loop, label %exit
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exit:
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ret void
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}
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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5
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; RUN: opt < %s -disable-output "-passes=print<da>" 2>&1 | FileCheck %s
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; Test case for bug #148435 - SIV test assertion failure
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define void @f(ptr %a) {
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; CHECK-LABEL: 'f'
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; CHECK-NEXT: Src: store i8 42, ptr %idx, align 1 --> Dst: store i8 42, ptr %idx, align 1
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; CHECK-NEXT: da analyze - output [* *]!
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;
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entry:
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br label %loop.i.header
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loop.i.header:
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%i = phi i64 [ 0, %entry ], [ %i.next, %loop.i.latch ]
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%and.i = and i64 %i, 1
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br label %loop.j
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loop.j:
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%j = phi i64 [ 0, %loop.i.header ], [ %j.next, %loop.j ]
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%and.j = and i64 %j, 1
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%idx = getelementptr [2 x [2 x i8]], ptr %a, i64 0, i64 %and.i, i64 %and.j
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store i8 42, ptr %idx
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%j.next = add i64 %j, 1
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%exitcond.j = icmp eq i64 %j.next, 100
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br i1 %exitcond.j, label %loop.i.latch, label %loop.j
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loop.i.latch:
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%i.next = add i64 %i, 1
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%exitcond.i = icmp eq i64 %i.next, 100
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br i1 %exitcond.i, label %exit, label %loop.i.header
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exit:
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ret void
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}
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; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py UTC_ARGS: --version 5
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; RUN: opt < %s -disable-output "-passes=print<da>" 2>&1 | FileCheck %s
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; Test case for wrapping AddRec detection in DependenceAnalysis.
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; This ensures that AddRec expressions that wrap (creating cyclic rather than
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; linear patterns) are rejected from SIV analysis and treated conservatively.
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; This test case has a clear dependence pattern that was incorrectly reported as "none!"
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; The issue: {false,+,true} in i1 arithmetic creates pattern (0,1,0,1,0,1,...).
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; - i=0: a[0][0][0], i=1: a[0][1][1], i=2: a[0][0][0], i=3: a[0][1][1], ...
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; - Clear dependencies at distances 2, 4, 6 between iterations accessing same locations.
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; - Strong SIV test was missing these due to treating wrapping pattern as linear.
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define void @test_wrapping_i1_addrec(ptr %a) {
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; CHECK-LABEL: 'test_wrapping_i1_addrec'
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; CHECK-NEXT: Src: store i8 0, ptr %idx, align 1 --> Dst: store i8 0, ptr %idx, align 1
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; CHECK-NEXT: da analyze - output [*]!
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;
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entry:
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br label %loop
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loop:
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%i = phi i64 [ 0, %entry ], [ %i.next, %loop ]
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%and = and i64 %i, 1
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%idx = getelementptr inbounds [4 x [4 x i8]], ptr %a, i64 0, i64 %and, i64 %and
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store i8 0, ptr %idx
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%i.next = add i64 %i, 1
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%exitcond.not = icmp slt i64 %i.next, 8
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br i1 %exitcond.not, label %loop, label %exit
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exit:
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ret void
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}

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