riscv: irq: Correct CLIC_INTATTR_TRIG_Msk

The trig field of clicintattr is indeed in bits 2:1. However, the mask
`CLIC_INTATTR_TRIG_Msk` is only applied directly to the bitfield
`INTATTR.b.trg`. Therefore it doesn't have to be shifted additionally.

Signed-off-by: Greter Raffael <[email protected]>

Author: raffi-g

drivers/interrupt_controller/intc_nuclei_eclic.c

@@ -88,10 +88,8 @@ struct CLICCTRL {
 /** ECLIC Mode mask for MTVT CSR Register */
 #define ECLIC_MODE_MTVEC_Msk   3U
 
-/** CLIC INTATTR: TRIG Position */
-#define CLIC_INTATTR_TRIG_Pos  1U
 /** CLIC INTATTR: TRIG Mask */
-#define CLIC_INTATTR_TRIG_Msk  (0x3UL << CLIC_INTATTR_TRIG_Pos)
+#define CLIC_INTATTR_TRIG_Msk  0x3U
 
 #define ECLIC_CFG       (*((volatile union CLICCFG  *)(DT_REG_ADDR_BY_IDX(DT_NODELABEL(eclic), 0))))
 #define ECLIC_INFO      (*((volatile union CLICINFO *)(DT_REG_ADDR_BY_IDX(DT_NODELABEL(eclic), 1))))