@@ -786,6 +786,11 @@ struct airoha_hw_stats {
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struct airoha_qdma {
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void __iomem * regs ;
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+ /* protect concurrent irqmask accesses */
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+ spinlock_t irq_lock ;
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+ u32 irqmask [QDMA_INT_REG_MAX ];
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+ int irq ;
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+
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struct airoha_tx_irq_queue q_tx_irq [AIROHA_NUM_TX_IRQ ];
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struct airoha_queue q_tx [AIROHA_NUM_TX_RING ];
@@ -812,11 +817,6 @@ struct airoha_eth {
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unsigned long state ;
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void __iomem * fe_regs ;
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- /* protect concurrent irqmask accesses */
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- spinlock_t irq_lock ;
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- u32 irqmask [QDMA_INT_REG_MAX ];
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- int irq ;
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-
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struct reset_control_bulk_data rsts [AIROHA_MAX_NUM_RSTS ];
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struct reset_control_bulk_data xsi_rsts [AIROHA_MAX_NUM_XSI_RSTS ];
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@@ -866,38 +866,37 @@ static u32 airoha_rmw(void __iomem *base, u32 offset, u32 mask, u32 val)
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#define airoha_qdma_clear (qdma , offset , val ) \
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airoha_rmw((qdma)->regs, (offset), (val), 0)
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- static void airoha_qdma_set_irqmask (struct airoha_eth * eth , int index ,
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+ static void airoha_qdma_set_irqmask (struct airoha_qdma * qdma , int index ,
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u32 clear , u32 set )
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{
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unsigned long flags ;
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- if (WARN_ON_ONCE (index >= ARRAY_SIZE (eth -> irqmask )))
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+ if (WARN_ON_ONCE (index >= ARRAY_SIZE (qdma -> irqmask )))
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return ;
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- spin_lock_irqsave (& eth -> irq_lock , flags );
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+ spin_lock_irqsave (& qdma -> irq_lock , flags );
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- eth -> irqmask [index ] &= ~clear ;
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- eth -> irqmask [index ] |= set ;
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- airoha_qdma_wr (& eth -> qdma [0 ], REG_INT_ENABLE (index ),
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- eth -> irqmask [index ]);
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+ qdma -> irqmask [index ] &= ~clear ;
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+ qdma -> irqmask [index ] |= set ;
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+ airoha_qdma_wr (qdma , REG_INT_ENABLE (index ), qdma -> irqmask [index ]);
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/* Read irq_enable register in order to guarantee the update above
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* completes in the spinlock critical section.
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*/
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- airoha_qdma_rr (& eth -> qdma [ 0 ] , REG_INT_ENABLE (index ));
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+ airoha_qdma_rr (qdma , REG_INT_ENABLE (index ));
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- spin_unlock_irqrestore (& eth -> irq_lock , flags );
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+ spin_unlock_irqrestore (& qdma -> irq_lock , flags );
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}
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- static void airoha_qdma_irq_enable (struct airoha_eth * eth , int index ,
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+ static void airoha_qdma_irq_enable (struct airoha_qdma * qdma , int index ,
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u32 mask )
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{
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- airoha_qdma_set_irqmask (eth , index , 0 , mask );
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+ airoha_qdma_set_irqmask (qdma , index , 0 , mask );
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}
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- static void airoha_qdma_irq_disable (struct airoha_eth * eth , int index ,
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+ static void airoha_qdma_irq_disable (struct airoha_qdma * qdma , int index ,
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u32 mask )
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{
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- airoha_qdma_set_irqmask (eth , index , mask , 0 );
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+ airoha_qdma_set_irqmask (qdma , index , mask , 0 );
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}
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static void airoha_set_macaddr (struct airoha_eth * eth , const u8 * addr )
@@ -1522,7 +1521,7 @@ static int airoha_qdma_rx_process(struct airoha_queue *q, int budget)
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static int airoha_qdma_rx_napi_poll (struct napi_struct * napi , int budget )
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{
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struct airoha_queue * q = container_of (napi , struct airoha_queue , napi );
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- struct airoha_eth * eth = q -> eth ;
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+ struct airoha_qdma * qdma = & q -> eth -> qdma [ 0 ] ;
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int cur , done = 0 ;
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do {
@@ -1531,7 +1530,7 @@ static int airoha_qdma_rx_napi_poll(struct napi_struct *napi, int budget)
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} while (cur && done < budget );
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if (done < budget && napi_complete (napi ))
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- airoha_qdma_irq_enable (eth , QDMA_INT_REG_IDX1 ,
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+ airoha_qdma_irq_enable (qdma , QDMA_INT_REG_IDX1 ,
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RX_DONE_INT_MASK );
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return done ;
@@ -1718,7 +1717,7 @@ static int airoha_qdma_tx_napi_poll(struct napi_struct *napi, int budget)
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}
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if (done < budget && napi_complete (napi ))
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- airoha_qdma_irq_enable (eth , QDMA_INT_REG_IDX0 ,
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+ airoha_qdma_irq_enable (qdma , QDMA_INT_REG_IDX0 ,
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TX_DONE_INT_MASK (id ));
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return done ;
@@ -1927,13 +1926,13 @@ static int airoha_qdma_hw_init(struct airoha_eth *eth,
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int i ;
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/* clear pending irqs */
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- for (i = 0 ; i < ARRAY_SIZE (eth -> irqmask ); i ++ )
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+ for (i = 0 ; i < ARRAY_SIZE (qdma -> irqmask ); i ++ )
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airoha_qdma_wr (qdma , REG_INT_STATUS (i ), 0xffffffff );
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/* setup irqs */
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- airoha_qdma_irq_enable (eth , QDMA_INT_REG_IDX0 , INT_IDX0_MASK );
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- airoha_qdma_irq_enable (eth , QDMA_INT_REG_IDX1 , INT_IDX1_MASK );
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- airoha_qdma_irq_enable (eth , QDMA_INT_REG_IDX4 , INT_IDX4_MASK );
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+ airoha_qdma_irq_enable (qdma , QDMA_INT_REG_IDX0 , INT_IDX0_MASK );
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+ airoha_qdma_irq_enable (qdma , QDMA_INT_REG_IDX1 , INT_IDX1_MASK );
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+ airoha_qdma_irq_enable (qdma , QDMA_INT_REG_IDX4 , INT_IDX4_MASK );
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/* setup irq binding */
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for (i = 0 ; i < ARRAY_SIZE (qdma -> q_tx ); i ++ ) {
@@ -1979,22 +1978,21 @@ static int airoha_qdma_hw_init(struct airoha_eth *eth,
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static irqreturn_t airoha_irq_handler (int irq , void * dev_instance )
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{
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struct airoha_eth * eth = dev_instance ;
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- u32 intr [ ARRAY_SIZE ( eth -> irqmask ) ];
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- struct airoha_qdma * qdma ;
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+ struct airoha_qdma * qdma = & eth -> qdma [ 0 ];
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+ u32 intr [ ARRAY_SIZE ( qdma -> irqmask )] ;
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int i ;
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- qdma = & eth -> qdma [0 ];
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- for (i = 0 ; i < ARRAY_SIZE (eth -> irqmask ); i ++ ) {
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+ for (i = 0 ; i < ARRAY_SIZE (qdma -> irqmask ); i ++ ) {
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intr [i ] = airoha_qdma_rr (qdma , REG_INT_STATUS (i ));
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- intr [i ] &= eth -> irqmask [i ];
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+ intr [i ] &= qdma -> irqmask [i ];
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airoha_qdma_wr (qdma , REG_INT_STATUS (i ), intr [i ]);
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}
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if (!test_bit (DEV_STATE_INITIALIZED , & eth -> state ))
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return IRQ_NONE ;
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if (intr [1 ] & RX_DONE_INT_MASK ) {
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- airoha_qdma_irq_disable (eth , QDMA_INT_REG_IDX1 ,
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+ airoha_qdma_irq_disable (qdma , QDMA_INT_REG_IDX1 ,
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RX_DONE_INT_MASK );
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for (i = 0 ; i < ARRAY_SIZE (qdma -> q_rx ); i ++ ) {
@@ -2014,7 +2012,7 @@ static irqreturn_t airoha_irq_handler(int irq, void *dev_instance)
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if (!(intr [0 ] & TX_DONE_INT_MASK (i )))
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continue ;
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- airoha_qdma_irq_disable (eth , QDMA_INT_REG_IDX0 ,
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+ airoha_qdma_irq_disable (qdma , QDMA_INT_REG_IDX0 ,
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TX_DONE_INT_MASK (i ));
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status = airoha_qdma_rr (qdma , REG_IRQ_STATUS (i ));
@@ -2029,12 +2027,18 @@ static irqreturn_t airoha_irq_handler(int irq, void *dev_instance)
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return IRQ_HANDLED ;
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}
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- static int airoha_qdma_init (struct airoha_eth * eth )
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+ static int airoha_qdma_init (struct platform_device * pdev ,
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+ struct airoha_eth * eth )
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{
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struct airoha_qdma * qdma = & eth -> qdma [0 ];
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int err ;
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- err = devm_request_irq (eth -> dev , eth -> irq , airoha_irq_handler ,
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+ spin_lock_init (& qdma -> irq_lock );
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+ qdma -> irq = platform_get_irq (pdev , 0 );
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+ if (qdma -> irq < 0 )
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+ return qdma -> irq ;
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+
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+ err = devm_request_irq (eth -> dev , qdma -> irq , airoha_irq_handler ,
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IRQF_SHARED , KBUILD_MODNAME , eth );
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if (err )
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return err ;
@@ -2060,7 +2064,8 @@ static int airoha_qdma_init(struct airoha_eth *eth)
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return 0 ;
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}
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- static int airoha_hw_init (struct airoha_eth * eth )
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+ static int airoha_hw_init (struct platform_device * pdev ,
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+ struct airoha_eth * eth )
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{
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int err ;
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@@ -2076,7 +2081,7 @@ static int airoha_hw_init(struct airoha_eth *eth)
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if (err )
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return err ;
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- return airoha_qdma_init (eth );
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+ return airoha_qdma_init (pdev , eth );
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}
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static void airoha_hw_cleanup (struct airoha_eth * eth )
@@ -2673,11 +2678,6 @@ static int airoha_probe(struct platform_device *pdev)
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return err ;
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}
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- spin_lock_init (& eth -> irq_lock );
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- eth -> irq = platform_get_irq (pdev , 0 );
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- if (eth -> irq < 0 )
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- return eth -> irq ;
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-
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eth -> napi_dev = alloc_netdev_dummy (0 );
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if (!eth -> napi_dev )
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return - ENOMEM ;
@@ -2687,7 +2687,7 @@ static int airoha_probe(struct platform_device *pdev)
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strscpy (eth -> napi_dev -> name , "qdma_eth" , sizeof (eth -> napi_dev -> name ));
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platform_set_drvdata (pdev , eth );
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- err = airoha_hw_init (eth );
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+ err = airoha_hw_init (pdev , eth );
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if (err )
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goto error ;
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