@@ -762,19 +762,11 @@ __init int exynos_eint_wkup_init(struct samsung_pinctrl_drv_data *d)
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return 0 ;
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}
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- static void exynos_pinctrl_suspend_bank (
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- struct samsung_pinctrl_drv_data * drvdata ,
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- struct samsung_pin_bank * bank )
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+ static void exynos_pinctrl_suspend_bank (struct samsung_pin_bank * bank )
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{
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struct exynos_eint_gpio_save * save = bank -> soc_priv ;
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const void __iomem * regs = bank -> eint_base ;
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- if (clk_enable (bank -> drvdata -> pclk )) {
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- dev_err (bank -> gpio_chip .parent ,
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- "unable to enable clock for saving state\n" );
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- return ;
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- }
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-
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save -> eint_con = readl (regs + EXYNOS_GPIO_ECON_OFFSET
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+ bank -> eint_offset );
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save -> eint_fltcon0 = readl (regs + EXYNOS_GPIO_EFLTCON_OFFSET
@@ -784,71 +776,46 @@ static void exynos_pinctrl_suspend_bank(
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save -> eint_mask = readl (regs + bank -> irq_chip -> eint_mask
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+ bank -> eint_offset );
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- clk_disable (bank -> drvdata -> pclk );
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-
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pr_debug ("%s: save con %#010x\n" , bank -> name , save -> eint_con );
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pr_debug ("%s: save fltcon0 %#010x\n" , bank -> name , save -> eint_fltcon0 );
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pr_debug ("%s: save fltcon1 %#010x\n" , bank -> name , save -> eint_fltcon1 );
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pr_debug ("%s: save mask %#010x\n" , bank -> name , save -> eint_mask );
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}
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- static void exynosauto_pinctrl_suspend_bank (struct samsung_pinctrl_drv_data * drvdata ,
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- struct samsung_pin_bank * bank )
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+ static void exynosauto_pinctrl_suspend_bank (struct samsung_pin_bank * bank )
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{
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struct exynos_eint_gpio_save * save = bank -> soc_priv ;
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const void __iomem * regs = bank -> eint_base ;
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- if (clk_enable (bank -> drvdata -> pclk )) {
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- dev_err (bank -> gpio_chip .parent ,
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- "unable to enable clock for saving state\n" );
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- return ;
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- }
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-
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save -> eint_con = readl (regs + bank -> pctl_offset + bank -> eint_con_offset );
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save -> eint_mask = readl (regs + bank -> pctl_offset + bank -> eint_mask_offset );
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- clk_disable (bank -> drvdata -> pclk );
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-
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pr_debug ("%s: save con %#010x\n" , bank -> name , save -> eint_con );
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pr_debug ("%s: save mask %#010x\n" , bank -> name , save -> eint_mask );
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}
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- void exynos_pinctrl_suspend (struct samsung_pinctrl_drv_data * drvdata )
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+ void exynos_pinctrl_suspend (struct samsung_pin_bank * bank )
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{
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- struct samsung_pin_bank * bank = drvdata -> pin_banks ;
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struct exynos_irq_chip * irq_chip = NULL ;
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- int i ;
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- for (i = 0 ; i < drvdata -> nr_banks ; ++ i , ++ bank ) {
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- if (bank -> eint_type == EINT_TYPE_GPIO ) {
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- if (bank -> eint_con_offset )
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- exynosauto_pinctrl_suspend_bank (drvdata , bank );
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- else
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- exynos_pinctrl_suspend_bank (drvdata , bank );
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- }
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- else if (bank -> eint_type == EINT_TYPE_WKUP ) {
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- if (!irq_chip ) {
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- irq_chip = bank -> irq_chip ;
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- irq_chip -> set_eint_wakeup_mask (drvdata ,
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- irq_chip );
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- }
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+ if (bank -> eint_type == EINT_TYPE_GPIO ) {
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+ if (bank -> eint_con_offset )
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+ exynosauto_pinctrl_suspend_bank (bank );
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+ else
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+ exynos_pinctrl_suspend_bank (bank );
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+ } else if (bank -> eint_type == EINT_TYPE_WKUP ) {
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+ if (!irq_chip ) {
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+ irq_chip = bank -> irq_chip ;
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+ irq_chip -> set_eint_wakeup_mask (bank -> drvdata , irq_chip );
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}
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}
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}
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- static void exynos_pinctrl_resume_bank (
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- struct samsung_pinctrl_drv_data * drvdata ,
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- struct samsung_pin_bank * bank )
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+ static void exynos_pinctrl_resume_bank (struct samsung_pin_bank * bank )
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{
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struct exynos_eint_gpio_save * save = bank -> soc_priv ;
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void __iomem * regs = bank -> eint_base ;
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- if (clk_enable (bank -> drvdata -> pclk )) {
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- dev_err (bank -> gpio_chip .parent ,
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- "unable to enable clock for restoring state\n" );
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- return ;
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- }
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-
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pr_debug ("%s: con %#010x => %#010x\n" , bank -> name ,
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readl (regs + EXYNOS_GPIO_ECON_OFFSET
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+ bank -> eint_offset ), save -> eint_con );
@@ -870,22 +837,13 @@ static void exynos_pinctrl_resume_bank(
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+ 2 * bank -> eint_offset + 4 );
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writel (save -> eint_mask , regs + bank -> irq_chip -> eint_mask
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+ bank -> eint_offset );
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-
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- clk_disable (bank -> drvdata -> pclk );
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}
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- static void exynosauto_pinctrl_resume_bank (struct samsung_pinctrl_drv_data * drvdata ,
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- struct samsung_pin_bank * bank )
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+ static void exynosauto_pinctrl_resume_bank (struct samsung_pin_bank * bank )
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{
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struct exynos_eint_gpio_save * save = bank -> soc_priv ;
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void __iomem * regs = bank -> eint_base ;
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- if (clk_enable (bank -> drvdata -> pclk )) {
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- dev_err (bank -> gpio_chip .parent ,
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- "unable to enable clock for restoring state\n" );
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- return ;
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- }
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-
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pr_debug ("%s: con %#010x => %#010x\n" , bank -> name ,
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readl (regs + bank -> pctl_offset + bank -> eint_con_offset ), save -> eint_con );
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pr_debug ("%s: mask %#010x => %#010x\n" , bank -> name ,
@@ -894,21 +852,16 @@ static void exynosauto_pinctrl_resume_bank(struct samsung_pinctrl_drv_data *drvd
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writel (save -> eint_con , regs + bank -> pctl_offset + bank -> eint_con_offset );
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writel (save -> eint_mask , regs + bank -> pctl_offset + bank -> eint_mask_offset );
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- clk_disable (bank -> drvdata -> pclk );
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}
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- void exynos_pinctrl_resume (struct samsung_pinctrl_drv_data * drvdata )
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+ void exynos_pinctrl_resume (struct samsung_pin_bank * bank )
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{
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- struct samsung_pin_bank * bank = drvdata -> pin_banks ;
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- int i ;
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-
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- for (i = 0 ; i < drvdata -> nr_banks ; ++ i , ++ bank )
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- if (bank -> eint_type == EINT_TYPE_GPIO ) {
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- if (bank -> eint_con_offset )
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- exynosauto_pinctrl_resume_bank (drvdata , bank );
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- else
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- exynos_pinctrl_resume_bank (drvdata , bank );
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- }
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+ if (bank -> eint_type == EINT_TYPE_GPIO ) {
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+ if (bank -> eint_con_offset )
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+ exynosauto_pinctrl_resume_bank (bank );
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+ else
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+ exynos_pinctrl_resume_bank (bank );
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+ }
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}
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static void exynos_retention_enable (struct samsung_pinctrl_drv_data * drvdata )
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