@@ -1018,7 +1018,7 @@ static struct mv88e6xxx_hw_stat mv88e6xxx_hw_stats[] = {
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};
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static uint64_t _mv88e6xxx_get_ethtool_stat (struct mv88e6xxx_chip * chip ,
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- struct mv88e6xxx_hw_stat * s ,
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+ const struct mv88e6xxx_hw_stat * s ,
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int port , u16 bank1_select ,
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u16 histogram )
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{
@@ -1201,59 +1201,82 @@ static int mv88e6xxx_get_sset_count(struct dsa_switch *ds, int port, int sset)
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return count ;
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}
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- static int mv88e6xxx_stats_get_stats (struct mv88e6xxx_chip * chip , int port ,
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- uint64_t * data , int types ,
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- u16 bank1_select , u16 histogram )
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+ static size_t mv88e6095_stats_get_stat (struct mv88e6xxx_chip * chip , int port ,
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+ const struct mv88e6xxx_hw_stat * stat ,
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+ uint64_t * data )
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{
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- struct mv88e6xxx_hw_stat * stat ;
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- int i , j ;
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+ if (!( stat -> type & ( STATS_TYPE_BANK0 | STATS_TYPE_PORT )))
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+ return 0 ;
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- for (i = 0 , j = 0 ; i < ARRAY_SIZE (mv88e6xxx_hw_stats ); i ++ ) {
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- stat = & mv88e6xxx_hw_stats [i ];
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- if (stat -> type & types ) {
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- mv88e6xxx_reg_lock (chip );
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- data [j ] = _mv88e6xxx_get_ethtool_stat (chip , stat , port ,
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- bank1_select ,
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- histogram );
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- mv88e6xxx_reg_unlock (chip );
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+ * data = _mv88e6xxx_get_ethtool_stat (chip , stat , port , 0 ,
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+ MV88E6XXX_G1_STATS_OP_HIST_RX_TX );
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+ return 1 ;
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+ }
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- j ++ ;
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- }
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- }
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- return j ;
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+ static size_t mv88e6250_stats_get_stat (struct mv88e6xxx_chip * chip , int port ,
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+ const struct mv88e6xxx_hw_stat * stat ,
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+ uint64_t * data )
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+ {
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+ if (!(stat -> type & STATS_TYPE_BANK0 ))
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+ return 0 ;
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+
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+ * data = _mv88e6xxx_get_ethtool_stat (chip , stat , port , 0 ,
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+ MV88E6XXX_G1_STATS_OP_HIST_RX_TX );
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+ return 1 ;
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}
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- static int mv88e6095_stats_get_stats (struct mv88e6xxx_chip * chip , int port ,
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- uint64_t * data )
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+ static size_t mv88e6320_stats_get_stat (struct mv88e6xxx_chip * chip , int port ,
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+ const struct mv88e6xxx_hw_stat * stat ,
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+ uint64_t * data )
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{
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- return mv88e6xxx_stats_get_stats (chip , port , data ,
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- STATS_TYPE_BANK0 | STATS_TYPE_PORT ,
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- 0 , MV88E6XXX_G1_STATS_OP_HIST_RX_TX );
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+ if (!(stat -> type & (STATS_TYPE_BANK0 | STATS_TYPE_BANK1 )))
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+ return 0 ;
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+
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+ * data = _mv88e6xxx_get_ethtool_stat (chip , stat , port ,
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+ MV88E6XXX_G1_STATS_OP_BANK_1_BIT_9 ,
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+ MV88E6XXX_G1_STATS_OP_HIST_RX_TX );
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+ return 1 ;
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}
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- static int mv88e6250_stats_get_stats (struct mv88e6xxx_chip * chip , int port ,
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- uint64_t * data )
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+ static size_t mv88e6390_stats_get_stat (struct mv88e6xxx_chip * chip , int port ,
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+ const struct mv88e6xxx_hw_stat * stat ,
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+ uint64_t * data )
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{
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- return mv88e6xxx_stats_get_stats (chip , port , data , STATS_TYPE_BANK0 ,
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- 0 , MV88E6XXX_G1_STATS_OP_HIST_RX_TX );
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+ if (!(stat -> type & (STATS_TYPE_BANK0 | STATS_TYPE_BANK1 )))
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+ return 0 ;
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+
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+ * data = _mv88e6xxx_get_ethtool_stat (chip , stat , port ,
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+ MV88E6XXX_G1_STATS_OP_BANK_1_BIT_10 ,
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+ 0 );
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+ return 1 ;
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}
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- static int mv88e6320_stats_get_stats (struct mv88e6xxx_chip * chip , int port ,
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- uint64_t * data )
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+ static size_t mv88e6xxx_stats_get_stat (struct mv88e6xxx_chip * chip , int port ,
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+ const struct mv88e6xxx_hw_stat * stat ,
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+ uint64_t * data )
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{
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- return mv88e6xxx_stats_get_stats (chip , port , data ,
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- STATS_TYPE_BANK0 | STATS_TYPE_BANK1 ,
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- MV88E6XXX_G1_STATS_OP_BANK_1_BIT_9 ,
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- MV88E6XXX_G1_STATS_OP_HIST_RX_TX );
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+ int ret = 0 ;
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+
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+ if (chip -> info -> ops -> stats_get_stat ) {
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+ mv88e6xxx_reg_lock (chip );
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+ ret = chip -> info -> ops -> stats_get_stat (chip , port , stat , data );
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+ mv88e6xxx_reg_unlock (chip );
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+ }
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+
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+ return ret ;
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}
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- static int mv88e6390_stats_get_stats (struct mv88e6xxx_chip * chip , int port ,
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- uint64_t * data )
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+ static size_t mv88e6xxx_stats_get_stats (struct mv88e6xxx_chip * chip , int port ,
1270
+ uint64_t * data )
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{
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- return mv88e6xxx_stats_get_stats (chip , port , data ,
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- STATS_TYPE_BANK0 | STATS_TYPE_BANK1 ,
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- MV88E6XXX_G1_STATS_OP_BANK_1_BIT_10 ,
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- 0 );
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+ struct mv88e6xxx_hw_stat * stat ;
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+ size_t i , j ;
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+
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+ for (i = 0 , j = 0 ; i < ARRAY_SIZE (mv88e6xxx_hw_stats ); i ++ ) {
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+ stat = & mv88e6xxx_hw_stats [i ];
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+ j += mv88e6xxx_stats_get_stat (chip , port , stat , & data [j ]);
1278
+ }
1279
+ return j ;
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}
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static void mv88e6xxx_atu_vtu_get_stats (struct mv88e6xxx_chip * chip , int port ,
@@ -1269,10 +1292,9 @@ static void mv88e6xxx_atu_vtu_get_stats(struct mv88e6xxx_chip *chip, int port,
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static void mv88e6xxx_get_stats (struct mv88e6xxx_chip * chip , int port ,
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uint64_t * data )
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{
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- int count = 0 ;
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+ size_t count ;
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- if (chip -> info -> ops -> stats_get_stats )
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- count = chip -> info -> ops -> stats_get_stats (chip , port , data );
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+ count = mv88e6xxx_stats_get_stats (chip , port , data );
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mv88e6xxx_reg_lock (chip );
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if (chip -> info -> ops -> serdes_get_stats ) {
@@ -3988,7 +4010,7 @@ static const struct mv88e6xxx_ops mv88e6085_ops = {
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.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
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.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
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.stats_get_strings = mv88e6095_stats_get_strings ,
3991
- .stats_get_stats = mv88e6095_stats_get_stats ,
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+ .stats_get_stat = mv88e6095_stats_get_stat ,
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.set_cpu_port = mv88e6095_g1_set_cpu_port ,
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.set_egress_port = mv88e6095_g1_set_egress_port ,
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.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -4026,7 +4048,7 @@ static const struct mv88e6xxx_ops mv88e6095_ops = {
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.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
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.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
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.stats_get_strings = mv88e6095_stats_get_strings ,
4029
- .stats_get_stats = mv88e6095_stats_get_stats ,
4051
+ .stats_get_stat = mv88e6095_stats_get_stat ,
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.mgmt_rsvd2cpu = mv88e6185_g2_mgmt_rsvd2cpu ,
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.ppu_enable = mv88e6185_g1_ppu_enable ,
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.ppu_disable = mv88e6185_g1_ppu_disable ,
@@ -4067,7 +4089,7 @@ static const struct mv88e6xxx_ops mv88e6097_ops = {
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.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
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.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
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.stats_get_strings = mv88e6095_stats_get_strings ,
4070
- .stats_get_stats = mv88e6095_stats_get_stats ,
4092
+ .stats_get_stat = mv88e6095_stats_get_stat ,
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.set_cpu_port = mv88e6095_g1_set_cpu_port ,
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.set_egress_port = mv88e6095_g1_set_egress_port ,
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.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -4109,7 +4131,7 @@ static const struct mv88e6xxx_ops mv88e6123_ops = {
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.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
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.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
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.stats_get_strings = mv88e6095_stats_get_strings ,
4112
- .stats_get_stats = mv88e6095_stats_get_stats ,
4134
+ .stats_get_stat = mv88e6095_stats_get_stat ,
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.set_cpu_port = mv88e6095_g1_set_cpu_port ,
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.set_egress_port = mv88e6095_g1_set_egress_port ,
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.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -4152,7 +4174,7 @@ static const struct mv88e6xxx_ops mv88e6131_ops = {
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4174
.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
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.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
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.stats_get_strings = mv88e6095_stats_get_strings ,
4155
- .stats_get_stats = mv88e6095_stats_get_stats ,
4177
+ .stats_get_stat = mv88e6095_stats_get_stat ,
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.set_cpu_port = mv88e6095_g1_set_cpu_port ,
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.set_egress_port = mv88e6095_g1_set_egress_port ,
4158
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.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -4201,7 +4223,7 @@ static const struct mv88e6xxx_ops mv88e6141_ops = {
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4223
.stats_set_histogram = mv88e6390_g1_stats_set_histogram ,
4202
4224
.stats_get_sset_count = mv88e6320_stats_get_sset_count ,
4203
4225
.stats_get_strings = mv88e6320_stats_get_strings ,
4204
- .stats_get_stats = mv88e6390_stats_get_stats ,
4226
+ .stats_get_stat = mv88e6390_stats_get_stat ,
4205
4227
.set_cpu_port = mv88e6390_g1_set_cpu_port ,
4206
4228
.set_egress_port = mv88e6390_g1_set_egress_port ,
4207
4229
.watchdog_ops = & mv88e6390_watchdog_ops ,
@@ -4256,7 +4278,7 @@ static const struct mv88e6xxx_ops mv88e6161_ops = {
4256
4278
.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
4257
4279
.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
4258
4280
.stats_get_strings = mv88e6095_stats_get_strings ,
4259
- .stats_get_stats = mv88e6095_stats_get_stats ,
4281
+ .stats_get_stat = mv88e6095_stats_get_stat ,
4260
4282
.set_cpu_port = mv88e6095_g1_set_cpu_port ,
4261
4283
.set_egress_port = mv88e6095_g1_set_egress_port ,
4262
4284
.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -4294,7 +4316,7 @@ static const struct mv88e6xxx_ops mv88e6165_ops = {
4294
4316
.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
4295
4317
.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
4296
4318
.stats_get_strings = mv88e6095_stats_get_strings ,
4297
- .stats_get_stats = mv88e6095_stats_get_stats ,
4319
+ .stats_get_stat = mv88e6095_stats_get_stat ,
4298
4320
.set_cpu_port = mv88e6095_g1_set_cpu_port ,
4299
4321
.set_egress_port = mv88e6095_g1_set_egress_port ,
4300
4322
.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -4342,7 +4364,7 @@ static const struct mv88e6xxx_ops mv88e6171_ops = {
4342
4364
.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
4343
4365
.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
4344
4366
.stats_get_strings = mv88e6095_stats_get_strings ,
4345
- .stats_get_stats = mv88e6095_stats_get_stats ,
4367
+ .stats_get_stat = mv88e6095_stats_get_stat ,
4346
4368
.set_cpu_port = mv88e6095_g1_set_cpu_port ,
4347
4369
.set_egress_port = mv88e6095_g1_set_egress_port ,
4348
4370
.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -4391,7 +4413,7 @@ static const struct mv88e6xxx_ops mv88e6172_ops = {
4391
4413
.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
4392
4414
.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
4393
4415
.stats_get_strings = mv88e6095_stats_get_strings ,
4394
- .stats_get_stats = mv88e6095_stats_get_stats ,
4416
+ .stats_get_stat = mv88e6095_stats_get_stat ,
4395
4417
.set_cpu_port = mv88e6095_g1_set_cpu_port ,
4396
4418
.set_egress_port = mv88e6095_g1_set_egress_port ,
4397
4419
.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -4442,7 +4464,7 @@ static const struct mv88e6xxx_ops mv88e6175_ops = {
4442
4464
.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
4443
4465
.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
4444
4466
.stats_get_strings = mv88e6095_stats_get_strings ,
4445
- .stats_get_stats = mv88e6095_stats_get_stats ,
4467
+ .stats_get_stat = mv88e6095_stats_get_stat ,
4446
4468
.set_cpu_port = mv88e6095_g1_set_cpu_port ,
4447
4469
.set_egress_port = mv88e6095_g1_set_egress_port ,
4448
4470
.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -4491,7 +4513,7 @@ static const struct mv88e6xxx_ops mv88e6176_ops = {
4491
4513
.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
4492
4514
.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
4493
4515
.stats_get_strings = mv88e6095_stats_get_strings ,
4494
- .stats_get_stats = mv88e6095_stats_get_stats ,
4516
+ .stats_get_stat = mv88e6095_stats_get_stat ,
4495
4517
.set_cpu_port = mv88e6095_g1_set_cpu_port ,
4496
4518
.set_egress_port = mv88e6095_g1_set_egress_port ,
4497
4519
.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -4536,7 +4558,7 @@ static const struct mv88e6xxx_ops mv88e6185_ops = {
4536
4558
.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
4537
4559
.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
4538
4560
.stats_get_strings = mv88e6095_stats_get_strings ,
4539
- .stats_get_stats = mv88e6095_stats_get_stats ,
4561
+ .stats_get_stat = mv88e6095_stats_get_stat ,
4540
4562
.set_cpu_port = mv88e6095_g1_set_cpu_port ,
4541
4563
.set_egress_port = mv88e6095_g1_set_egress_port ,
4542
4564
.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -4585,7 +4607,7 @@ static const struct mv88e6xxx_ops mv88e6190_ops = {
4585
4607
.stats_set_histogram = mv88e6390_g1_stats_set_histogram ,
4586
4608
.stats_get_sset_count = mv88e6320_stats_get_sset_count ,
4587
4609
.stats_get_strings = mv88e6320_stats_get_strings ,
4588
- .stats_get_stats = mv88e6390_stats_get_stats ,
4610
+ .stats_get_stat = mv88e6390_stats_get_stat ,
4589
4611
.set_cpu_port = mv88e6390_g1_set_cpu_port ,
4590
4612
.set_egress_port = mv88e6390_g1_set_egress_port ,
4591
4613
.watchdog_ops = & mv88e6390_watchdog_ops ,
@@ -4643,7 +4665,7 @@ static const struct mv88e6xxx_ops mv88e6190x_ops = {
4643
4665
.stats_set_histogram = mv88e6390_g1_stats_set_histogram ,
4644
4666
.stats_get_sset_count = mv88e6320_stats_get_sset_count ,
4645
4667
.stats_get_strings = mv88e6320_stats_get_strings ,
4646
- .stats_get_stats = mv88e6390_stats_get_stats ,
4668
+ .stats_get_stat = mv88e6390_stats_get_stat ,
4647
4669
.set_cpu_port = mv88e6390_g1_set_cpu_port ,
4648
4670
.set_egress_port = mv88e6390_g1_set_egress_port ,
4649
4671
.watchdog_ops = & mv88e6390_watchdog_ops ,
@@ -4699,7 +4721,7 @@ static const struct mv88e6xxx_ops mv88e6191_ops = {
4699
4721
.stats_set_histogram = mv88e6390_g1_stats_set_histogram ,
4700
4722
.stats_get_sset_count = mv88e6320_stats_get_sset_count ,
4701
4723
.stats_get_strings = mv88e6320_stats_get_strings ,
4702
- .stats_get_stats = mv88e6390_stats_get_stats ,
4724
+ .stats_get_stat = mv88e6390_stats_get_stat ,
4703
4725
.set_cpu_port = mv88e6390_g1_set_cpu_port ,
4704
4726
.set_egress_port = mv88e6390_g1_set_egress_port ,
4705
4727
.watchdog_ops = & mv88e6390_watchdog_ops ,
@@ -4758,7 +4780,7 @@ static const struct mv88e6xxx_ops mv88e6240_ops = {
4758
4780
.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
4759
4781
.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
4760
4782
.stats_get_strings = mv88e6095_stats_get_strings ,
4761
- .stats_get_stats = mv88e6095_stats_get_stats ,
4783
+ .stats_get_stat = mv88e6095_stats_get_stat ,
4762
4784
.set_cpu_port = mv88e6095_g1_set_cpu_port ,
4763
4785
.set_egress_port = mv88e6095_g1_set_egress_port ,
4764
4786
.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -4811,7 +4833,7 @@ static const struct mv88e6xxx_ops mv88e6250_ops = {
4811
4833
.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
4812
4834
.stats_get_sset_count = mv88e6250_stats_get_sset_count ,
4813
4835
.stats_get_strings = mv88e6250_stats_get_strings ,
4814
- .stats_get_stats = mv88e6250_stats_get_stats ,
4836
+ .stats_get_stat = mv88e6250_stats_get_stat ,
4815
4837
.set_cpu_port = mv88e6095_g1_set_cpu_port ,
4816
4838
.set_egress_port = mv88e6095_g1_set_egress_port ,
4817
4839
.watchdog_ops = & mv88e6250_watchdog_ops ,
@@ -4858,7 +4880,7 @@ static const struct mv88e6xxx_ops mv88e6290_ops = {
4858
4880
.stats_set_histogram = mv88e6390_g1_stats_set_histogram ,
4859
4881
.stats_get_sset_count = mv88e6320_stats_get_sset_count ,
4860
4882
.stats_get_strings = mv88e6320_stats_get_strings ,
4861
- .stats_get_stats = mv88e6390_stats_get_stats ,
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+ .stats_get_stat = mv88e6390_stats_get_stat ,
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.set_cpu_port = mv88e6390_g1_set_cpu_port ,
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.set_egress_port = mv88e6390_g1_set_egress_port ,
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.watchdog_ops = & mv88e6390_watchdog_ops ,
@@ -4917,7 +4939,7 @@ static const struct mv88e6xxx_ops mv88e6320_ops = {
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.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
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.stats_get_sset_count = mv88e6320_stats_get_sset_count ,
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.stats_get_strings = mv88e6320_stats_get_strings ,
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- .stats_get_stats = mv88e6320_stats_get_stats ,
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+ .stats_get_stat = mv88e6320_stats_get_stat ,
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.set_cpu_port = mv88e6095_g1_set_cpu_port ,
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.set_egress_port = mv88e6095_g1_set_egress_port ,
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.watchdog_ops = & mv88e6390_watchdog_ops ,
@@ -4964,7 +4986,7 @@ static const struct mv88e6xxx_ops mv88e6321_ops = {
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.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
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.stats_get_sset_count = mv88e6320_stats_get_sset_count ,
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.stats_get_strings = mv88e6320_stats_get_strings ,
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- .stats_get_stats = mv88e6320_stats_get_stats ,
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+ .stats_get_stat = mv88e6320_stats_get_stat ,
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.set_cpu_port = mv88e6095_g1_set_cpu_port ,
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.set_egress_port = mv88e6095_g1_set_egress_port ,
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.watchdog_ops = & mv88e6390_watchdog_ops ,
@@ -5013,7 +5035,7 @@ static const struct mv88e6xxx_ops mv88e6341_ops = {
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.stats_set_histogram = mv88e6390_g1_stats_set_histogram ,
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.stats_get_sset_count = mv88e6320_stats_get_sset_count ,
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.stats_get_strings = mv88e6320_stats_get_strings ,
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- .stats_get_stats = mv88e6390_stats_get_stats ,
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+ .stats_get_stat = mv88e6390_stats_get_stat ,
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.set_cpu_port = mv88e6390_g1_set_cpu_port ,
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.set_egress_port = mv88e6390_g1_set_egress_port ,
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.watchdog_ops = & mv88e6390_watchdog_ops ,
@@ -5071,7 +5093,7 @@ static const struct mv88e6xxx_ops mv88e6350_ops = {
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.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
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.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
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.stats_get_strings = mv88e6095_stats_get_strings ,
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- .stats_get_stats = mv88e6095_stats_get_stats ,
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+ .stats_get_stat = mv88e6095_stats_get_stat ,
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.set_cpu_port = mv88e6095_g1_set_cpu_port ,
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.set_egress_port = mv88e6095_g1_set_egress_port ,
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.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -5117,7 +5139,7 @@ static const struct mv88e6xxx_ops mv88e6351_ops = {
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.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
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.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
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.stats_get_strings = mv88e6095_stats_get_strings ,
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- .stats_get_stats = mv88e6095_stats_get_stats ,
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+ .stats_get_stat = mv88e6095_stats_get_stat ,
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.set_cpu_port = mv88e6095_g1_set_cpu_port ,
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.set_egress_port = mv88e6095_g1_set_egress_port ,
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.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -5168,7 +5190,7 @@ static const struct mv88e6xxx_ops mv88e6352_ops = {
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.stats_set_histogram = mv88e6095_g1_stats_set_histogram ,
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.stats_get_sset_count = mv88e6095_stats_get_sset_count ,
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.stats_get_strings = mv88e6095_stats_get_strings ,
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- .stats_get_stats = mv88e6095_stats_get_stats ,
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+ .stats_get_stat = mv88e6095_stats_get_stat ,
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.set_cpu_port = mv88e6095_g1_set_cpu_port ,
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.set_egress_port = mv88e6095_g1_set_egress_port ,
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.watchdog_ops = & mv88e6097_watchdog_ops ,
@@ -5230,7 +5252,7 @@ static const struct mv88e6xxx_ops mv88e6390_ops = {
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.stats_set_histogram = mv88e6390_g1_stats_set_histogram ,
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.stats_get_sset_count = mv88e6320_stats_get_sset_count ,
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.stats_get_strings = mv88e6320_stats_get_strings ,
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- .stats_get_stats = mv88e6390_stats_get_stats ,
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+ .stats_get_stat = mv88e6390_stats_get_stat ,
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.set_cpu_port = mv88e6390_g1_set_cpu_port ,
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.set_egress_port = mv88e6390_g1_set_egress_port ,
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.watchdog_ops = & mv88e6390_watchdog_ops ,
@@ -5292,7 +5314,7 @@ static const struct mv88e6xxx_ops mv88e6390x_ops = {
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.stats_set_histogram = mv88e6390_g1_stats_set_histogram ,
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.stats_get_sset_count = mv88e6320_stats_get_sset_count ,
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.stats_get_strings = mv88e6320_stats_get_strings ,
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- .stats_get_stats = mv88e6390_stats_get_stats ,
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+ .stats_get_stat = mv88e6390_stats_get_stat ,
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.set_cpu_port = mv88e6390_g1_set_cpu_port ,
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.set_egress_port = mv88e6390_g1_set_egress_port ,
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.watchdog_ops = & mv88e6390_watchdog_ops ,
@@ -5354,7 +5376,7 @@ static const struct mv88e6xxx_ops mv88e6393x_ops = {
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.stats_set_histogram = mv88e6390_g1_stats_set_histogram ,
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.stats_get_sset_count = mv88e6320_stats_get_sset_count ,
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.stats_get_strings = mv88e6320_stats_get_strings ,
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- .stats_get_stats = mv88e6390_stats_get_stats ,
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+ .stats_get_stat = mv88e6390_stats_get_stat ,
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/* .set_cpu_port is missing because this family does not support a global
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* CPU port, only per port CPU port which is set via
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* .port_set_upstream_port method.
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