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Ingo Molnar
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Merge tag 'v6.16' into x86/cpu, to resolve conflict
Resolve overlapping context conflict between this upstream fix: d8010d4 ("x86/bugs: Add a Transient Scheduler Attacks mitigation") And this pending commit in tip:x86/cpu: 65f55a3 ("x86/CPU/AMD: Add CPUID faulting support") Conflicts: arch/x86/kernel/cpu/amd.c Signed-off-by: Ingo Molnar <[email protected]>
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.mailmap

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@@ -197,6 +197,7 @@ Daniel Borkmann <[email protected]> <[email protected]>
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David Brownell <[email protected]>
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Domen Puncer <[email protected]>
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Douglas Gilbert <[email protected]>
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Ed L. Cashin <[email protected]>
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Enric Balletbo i Serra <[email protected]> <[email protected]>
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Gustavo Padovan <[email protected]>
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Kirill A. Shutemov <[email protected]> <[email protected]>
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Kishon Vijay Abraham I <[email protected]> <[email protected]>
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@@ -689,11 +694,16 @@ Sedat Dilek <[email protected]> <[email protected]>
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Sergey Senozhatsky <[email protected]> <[email protected]>
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Sergey Senozhatsky <[email protected]> <[email protected]>
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Sergey Senozhatsky <[email protected]> <[email protected]>
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Sergey Senozhatsky <[email protected]> <[email protected]>
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Sharath Chandra Vurukala <[email protected]> <[email protected]>
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Yusuke Goda <[email protected]>
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CREDITS

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D: NAND flash hardware support, JFFS2 on NAND flash
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N: Jérôme Glisse
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D: HMM - Heterogeneous Memory Management
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N: Richard E. Gooch
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D: parent process death signal to children
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S: Potsdam, New York 13676
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S: USA
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N: Shannon Nelson
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D: Worked on several network drivers including
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D: ixgbe, i40e, ionic, pds_core, pds_vdpa, pds_fwctl
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N: Dave Neuer
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D: Helped implement support for Compaq's H31xx series iPAQs

Documentation/ABI/testing/sysfs-devices-power

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Contact: Rafael J. Wysocki <[email protected]>
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Description:
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The /sys/devices/.../async attribute allows the user space to
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enable or diasble the device's suspend and resume callbacks to
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enable or disable the device's suspend and resume callbacks to
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be executed asynchronously (ie. in separate threads, in parallel
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with the main suspend/resume thread) during system-wide power
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transitions (eg. suspend to RAM, hibernation).

Documentation/ABI/testing/sysfs-devices-system-cpu

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/sys/devices/system/cpu/vulnerabilities/spectre_v1
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/sys/devices/system/cpu/vulnerabilities/spectre_v2
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/sys/devices/system/cpu/vulnerabilities/srbds
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/sys/devices/system/cpu/vulnerabilities/tsa
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/sys/devices/system/cpu/vulnerabilities/tsx_async_abort
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Date: January 2018
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Documentation/ABI/testing/sysfs-driver-ufs

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The file is read only.
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What: /sys/class/scsi_device/*/device/unit_descriptor/physical_memory_resourse_count
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What: /sys/class/scsi_device/*/device/unit_descriptor/physical_memory_resource_count
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Date: February 2018
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Documentation/ABI/testing/sysfs-edac-scrub

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(RO) Supported minimum scrub cycle duration in seconds
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Device-based scrub: returns the minimum scrub cycle
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supported by the memory device.
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Region-based scrub: returns the max of minimum scrub cycles
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supported by individual memory devices that back the region.
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What: /sys/bus/edac/devices/<dev-name>/scrubX/max_cycle_duration
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Device-based scrub: returns the maximum scrub cycle supported
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by the memory device.
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Region-based scrub: returns the min of maximum scrub cycles
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supported by individual memory devices that back the region.
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If the memory device does not provide maximum scrub cycle
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information, return the maximum supported value of the scrub
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cycle field.
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Documentation/admin-guide/cgroup-v2.rst

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Number of NUMA hinting faults.
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Number of task migration by NUMA balancing.
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numa_task_swapped (npn)
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Number of task swap by NUMA balancing.
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pgdemote_kswapd
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Number of pages demoted by kswapd.
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Documentation/admin-guide/hw-vuln/processor_mmio_stale_data.rst

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combination with a microcode update. The microcode clears the affected CPU
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buffers when the VERW instruction is executed.
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kernel/userspace, hypervisor/guest and C-state (idle) transitions. No

Documentation/admin-guide/kernel-parameters.txt

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having this key zero'ed is acceptable. E.g. in testing
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scenarios.
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tsa= [X86] Control mitigation for Transient Scheduler
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Attacks on AMD CPUs. Search the following in your
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favourite search engine for more details:
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"Technical guidance for mitigating transient scheduler
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attacks".
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off - disable the mitigation
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on - enable the mitigation (default)
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user - mitigate only user/kernel transitions
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vm - mitigate only guest/host transitions
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tsc= Disable clocksource stability checks for TSC.
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[x86] reliable: mark tsc clocksource as reliable, this

Documentation/arch/arm64/booting.rst

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- ICC_SRE_EL2.Enable (bit 3) must be initialised to 0b1
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- The DT or ACPI tables must describe a GICv3 interrupt controller.

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