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msatwoodlucasdemarchi
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drm/xe: extend Wa_15015404425 to apply to PTL
Wa_15015404425 only needs to be applied on PTL platforms with an A step compute die. There is no way to map PCI revid to the compute die stepping. The easiest way to figure out compute die stepping our end is to map the media IP's stepping to the compute die. For PTL, compute die has an A stepping if and only if the media IP's stepping is also A-step (This relationship is determined on a per platform basis and just happens to be this way on PTL). In addition this workaround is a chicken-and-egg problem. Wa_15015404425 requires that all register reads be preceded by four dummy MMIO writes (including during early driver init and even pre-OS firmware). The driver needs to perform some MMIO reads during init which include the GMD_ID register that contains the Media IPs stepping. To handle this in the safest manner assume the workaround applies to all of PTL during driver probe and deactivate the workaround after. The overall solution becomes a set of two workarounds: * 15015404425 - a Device OOB workaround that's always active for PTL * 15015404425_disable - a GT OOB workaround that applies to PTL platfroms with a B0 or later stepping The first of these workarounds issues dummy MMIO writes we do when reading registers. The second guards logic that disables the first once we have the necessary information later in the probe process. v2: rename SoC to device, avoid null pointer dereference, update commit message. v3: rebase v5: move disable check into xe_device_probe to avoid linking in xe_wa into xe_pci, reword commit message v6: squash extension and b0 support into 1 patch Reviewed-by: Lucas De Marchi <[email protected]> Signed-off-by: Matt Atwood <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Lucas De Marchi <[email protected]>
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drivers/gpu/drm/xe/xe_device.c

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@@ -68,6 +68,7 @@
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#include "xe_wait_user_fence.h"
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#include "xe_wa.h"
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#include <generated/xe_device_wa_oob.h>
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#include <generated/xe_wa_oob.h>
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static int xe_file_open(struct drm_device *dev, struct drm_file *file)
@@ -864,6 +865,10 @@ int xe_device_probe(struct xe_device *xe)
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return err;
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}
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if (xe->tiles->media_gt &&
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XE_WA(xe->tiles->media_gt, 15015404425_disable))
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XE_DEVICE_WA_DISABLE(xe, 15015404425);
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xe_nvm_init(xe);
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err = xe_heci_gsc_init(xe);
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15015404425 PLATFORM(LUNARLAKE)
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PLATFORM(PANTHERLAKE)

drivers/gpu/drm/xe/xe_wa.h

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@@ -45,4 +45,9 @@ void xe_wa_dump(struct xe_gt *gt, struct drm_printer *p);
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test_bit(XE_DEVICE_WA_OOB_ ## id__, (xe__)->wa_active.oob); \
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})
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#define XE_DEVICE_WA_DISABLE(xe__, id__) ({ \
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xe_assert(xe__, (xe__)->wa_active.oob_initialized); \
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clear_bit(XE_DEVICE_WA_OOB_ ## id__, (xe__)->wa_active.oob); \
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})
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#endif

drivers/gpu/drm/xe/xe_wa_oob.rules

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@@ -70,3 +70,5 @@ no_media_l3 MEDIA_VERSION(3000)
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# SoC workaround - currently applies to all platforms with the following
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# primary GT GMDID
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14022085890 GRAPHICS_VERSION(2001)
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15015404425_disable PLATFORM(PANTHERLAKE), MEDIA_STEP(B0, FOREVER)

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