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EDAC/igen6: Fix NULL pointer dereference
A kernel panic was reported with the following kernel log: EDAC igen6: Expected 2 mcs, but only 1 detected. BUG: unable to handle page fault for address: 000000000000d570 ... Hardware name: Notebook V54x_6x_TU/V54x_6x_TU, BIOS Dasharo (coreboot+UEFI) v0.9.0 07/17/2024 RIP: e030:ecclog_handler+0x7e/0xf0 [igen6_edac] ... igen6_probe+0x2a0/0x343 [igen6_edac] ... igen6_init+0xc5/0xff0 [igen6_edac] ... This issue occurred because one memory controller was disabled by the BIOS but the igen6_edac driver still checked all the memory controllers, including this absent one, to identify the source of the error. Accessing the null MMIO for the absent memory controller resulted in the oops above. Fix this issue by reverting the configuration structure to non-const and updating the field 'res_cfg->num_imc' to reflect the number of detected memory controllers. Fixes: 20e190b ("EDAC/igen6: Skip absent memory controllers") Reported-by: Marek Marczykowski-Górecki <[email protected]> Closes: https://lore.kernel.org/all/aFFN7RlXkaK_loQb@mail-itl/ Suggested-by: Borislav Petkov <[email protected]> Signed-off-by: Qiuxu Zhuo <[email protected]> Signed-off-by: Tony Luck <[email protected]> Signed-off-by: Borislav Petkov (AMD) <[email protected]> Tested-by: Marek Marczykowski-Górecki <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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drivers/edac/igen6_edac.c

Lines changed: 13 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -125,7 +125,7 @@
125125
#define MEM_SLICE_HASH_MASK(v) (GET_BITFIELD(v, 6, 19) << 6)
126126
#define MEM_SLICE_HASH_LSB_MASK_BIT(v) GET_BITFIELD(v, 24, 26)
127127

128-
static const struct res_config {
128+
static struct res_config {
129129
bool machine_check;
130130
/* The number of present memory controllers. */
131131
int num_imc;
@@ -479,7 +479,7 @@ static u64 rpl_p_err_addr(u64 ecclog)
479479
return ECC_ERROR_LOG_ADDR45(ecclog);
480480
}
481481

482-
static const struct res_config ehl_cfg = {
482+
static struct res_config ehl_cfg = {
483483
.num_imc = 1,
484484
.imc_base = 0x5000,
485485
.ibecc_base = 0xdc00,
@@ -489,7 +489,7 @@ static const struct res_config ehl_cfg = {
489489
.err_addr_to_imc_addr = ehl_err_addr_to_imc_addr,
490490
};
491491

492-
static const struct res_config icl_cfg = {
492+
static struct res_config icl_cfg = {
493493
.num_imc = 1,
494494
.imc_base = 0x5000,
495495
.ibecc_base = 0xd800,
@@ -499,7 +499,7 @@ static const struct res_config icl_cfg = {
499499
.err_addr_to_imc_addr = ehl_err_addr_to_imc_addr,
500500
};
501501

502-
static const struct res_config tgl_cfg = {
502+
static struct res_config tgl_cfg = {
503503
.machine_check = true,
504504
.num_imc = 2,
505505
.imc_base = 0x5000,
@@ -513,7 +513,7 @@ static const struct res_config tgl_cfg = {
513513
.err_addr_to_imc_addr = tgl_err_addr_to_imc_addr,
514514
};
515515

516-
static const struct res_config adl_cfg = {
516+
static struct res_config adl_cfg = {
517517
.machine_check = true,
518518
.num_imc = 2,
519519
.imc_base = 0xd800,
@@ -524,7 +524,7 @@ static const struct res_config adl_cfg = {
524524
.err_addr_to_imc_addr = adl_err_addr_to_imc_addr,
525525
};
526526

527-
static const struct res_config adl_n_cfg = {
527+
static struct res_config adl_n_cfg = {
528528
.machine_check = true,
529529
.num_imc = 1,
530530
.imc_base = 0xd800,
@@ -535,7 +535,7 @@ static const struct res_config adl_n_cfg = {
535535
.err_addr_to_imc_addr = adl_err_addr_to_imc_addr,
536536
};
537537

538-
static const struct res_config rpl_p_cfg = {
538+
static struct res_config rpl_p_cfg = {
539539
.machine_check = true,
540540
.num_imc = 2,
541541
.imc_base = 0xd800,
@@ -547,7 +547,7 @@ static const struct res_config rpl_p_cfg = {
547547
.err_addr_to_imc_addr = adl_err_addr_to_imc_addr,
548548
};
549549

550-
static const struct res_config mtl_ps_cfg = {
550+
static struct res_config mtl_ps_cfg = {
551551
.machine_check = true,
552552
.num_imc = 2,
553553
.imc_base = 0xd800,
@@ -558,7 +558,7 @@ static const struct res_config mtl_ps_cfg = {
558558
.err_addr_to_imc_addr = adl_err_addr_to_imc_addr,
559559
};
560560

561-
static const struct res_config mtl_p_cfg = {
561+
static struct res_config mtl_p_cfg = {
562562
.machine_check = true,
563563
.num_imc = 2,
564564
.imc_base = 0xd800,
@@ -569,7 +569,7 @@ static const struct res_config mtl_p_cfg = {
569569
.err_addr_to_imc_addr = adl_err_addr_to_imc_addr,
570570
};
571571

572-
static const struct pci_device_id igen6_pci_tbl[] = {
572+
static struct pci_device_id igen6_pci_tbl[] = {
573573
{ PCI_VDEVICE(INTEL, DID_EHL_SKU5), (kernel_ulong_t)&ehl_cfg },
574574
{ PCI_VDEVICE(INTEL, DID_EHL_SKU6), (kernel_ulong_t)&ehl_cfg },
575575
{ PCI_VDEVICE(INTEL, DID_EHL_SKU7), (kernel_ulong_t)&ehl_cfg },
@@ -1350,9 +1350,11 @@ static int igen6_register_mcis(struct pci_dev *pdev, u64 mchbar)
13501350
return -ENODEV;
13511351
}
13521352

1353-
if (lmc < res_cfg->num_imc)
1353+
if (lmc < res_cfg->num_imc) {
13541354
igen6_printk(KERN_WARNING, "Expected %d mcs, but only %d detected.",
13551355
res_cfg->num_imc, lmc);
1356+
res_cfg->num_imc = lmc;
1357+
}
13561358

13571359
return 0;
13581360

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