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Merge patch series "can: add Transmitter Delay Compensation (TDC) documentation"
Vincent Mailhol <[email protected]> says: TDC was added to the kernel in 2021 but I never took time to update the documentation. The year is now 2025... As we say: "better late than never"! The first patch is a small clean up which fixes an incorrect statement concerning the CAN DLC, the second patch is the real thing and adds the documentation of how to use the ip tool to configure the TDC. Link: https://patch.msgid.link/[email protected] Signed-off-by: Marc Kleine-Budde <[email protected]>
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Documentation/networking/can.rst

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@@ -1398,10 +1398,9 @@ second bit timing has to be specified in order to enable the CAN FD bitrate.
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Additionally CAN FD capable CAN controllers support up to 64 bytes of
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payload. The representation of this length in can_frame.len and
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canfd_frame.len for userspace applications and inside the Linux network
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layer is a plain value from 0 .. 64 instead of the CAN 'data length code'.
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The data length code was a 1:1 mapping to the payload length in the Classical
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CAN frames anyway. The payload length to the bus-relevant DLC mapping is
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only performed inside the CAN drivers, preferably with the helper
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layer is a plain value from 0 .. 64 instead of the Classical CAN length
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which ranges from 0 to 8. The payload length to the bus-relevant DLC mapping
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is only performed inside the CAN drivers, preferably with the helper
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functions can_fd_dlc2len() and can_fd_len2dlc().
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The CAN netdevice driver capabilities can be distinguished by the network
@@ -1465,6 +1464,70 @@ Example when 'fd-non-iso on' is added on this switchable CAN FD adapter::
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can <FD,FD-NON-ISO> state ERROR-ACTIVE (berr-counter tx 0 rx 0) restart-ms 0
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Transmitter Delay Compensation
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~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
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At high bit rates, the propagation delay from the TX pin to the RX pin of
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the transceiver might become greater than the actual bit time causing
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measurement errors: the RX pin would still be measuring the previous bit.
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The Transmitter Delay Compensation (thereafter, TDC) resolves this problem
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by introducing a Secondary Sample Point (SSP) equal to the distance, in
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minimum time quantum, from the start of the bit time on the TX pin to the
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actual measurement on the RX pin. The SSP is calculated as the sum of two
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configurable values: the TDC Value (TDCV) and the TDC offset (TDCO).
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TDC, if supported by the device, can be configured together with CAN-FD
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using the ip tool's "tdc-mode" argument as follow:
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**omitted**
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When no "tdc-mode" option is provided, the kernel will automatically
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decide whether TDC should be turned on, in which case it will
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calculate a default TDCO and use the TDCV as measured by the
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device. This is the recommended method to use TDC.
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**"tdc-mode off"**
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TDC is explicitly disabled.
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**"tdc-mode auto"**
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The user must provide the "tdco" argument. The TDCV will be
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automatically calculated by the device. This option is only
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available if the device supports the TDC-AUTO CAN controller mode.
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**"tdc-mode manual"**
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The user must provide both the "tdco" and "tdcv" arguments. This
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option is only available if the device supports the TDC-MANUAL CAN
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controller mode.
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Note that some devices may offer an additional parameter: "tdcf" (TDC Filter
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window). If supported by your device, this can be added as an optional
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argument to either "tdc-mode auto" or "tdc-mode manual".
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Example configuring a 500 kbit/s arbitration bitrate, a 5 Mbit/s data
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bitrate, a TDCO of 15 minimum time quantum and a TDCV automatically measured
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by the device::
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$ ip link set can0 up type can bitrate 500000 \
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fd on dbitrate 4000000 \
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tdc-mode auto tdco 15
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$ ip -details link show can0
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5: can0: <NOARP,UP,LOWER_UP,ECHO> mtu 72 qdisc pfifo_fast state UP \
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mode DEFAULT group default qlen 10
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link/can promiscuity 0 allmulti 0 minmtu 72 maxmtu 72
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can <FD,TDC-AUTO> state ERROR-ACTIVE restart-ms 0
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bitrate 500000 sample-point 0.875
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tq 12 prop-seg 69 phase-seg1 70 phase-seg2 20 sjw 10 brp 1
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ES582.1/ES584.1: tseg1 2..256 tseg2 2..128 sjw 1..128 brp 1..512 \
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brp_inc 1
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dbitrate 4000000 dsample-point 0.750
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dtq 12 dprop-seg 7 dphase-seg1 7 dphase-seg2 5 dsjw 2 dbrp 1
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tdco 15 tdcf 0
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ES582.1/ES584.1: dtseg1 2..32 dtseg2 1..16 dsjw 1..8 dbrp 1..32 \
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dbrp_inc 1
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tdco 0..127 tdcf 0..127
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clock 80000000
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Supported CAN Hardware
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----------------------
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