@@ -709,44 +709,40 @@ rzv2h_cpg_register_mod_clk(const struct rzv2h_mod_clk *mod,
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mod -> name , PTR_ERR (clk ));
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}
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- static int rzv2h_cpg_assert (struct reset_controller_dev * rcdev ,
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- unsigned long id )
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+ static int __rzv2h_cpg_assert (struct reset_controller_dev * rcdev ,
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+ unsigned long id , bool assert )
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{
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struct rzv2h_cpg_priv * priv = rcdev_to_priv (rcdev );
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unsigned int reg = GET_RST_OFFSET (priv -> resets [id ].reset_index );
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u32 mask = BIT (priv -> resets [id ].reset_bit );
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u8 monbit = priv -> resets [id ].mon_bit ;
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u32 value = mask << 16 ;
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- dev_dbg (rcdev -> dev , "assert id:%ld offset:0x%x\n" , id , reg );
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+ dev_dbg (rcdev -> dev , "%s id:%ld offset:0x%x\n" ,
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+ assert ? "assert" : "deassert" , id , reg );
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+ if (!assert )
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+ value |= mask ;
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writel (value , priv -> base + reg );
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reg = GET_RST_MON_OFFSET (priv -> resets [id ].mon_index );
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mask = BIT (monbit );
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return readl_poll_timeout_atomic (priv -> base + reg , value ,
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- value & mask , 10 , 200 );
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+ assert ? (value & mask ) : !(value & mask ),
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+ 10 , 200 );
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+ }
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+
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+ static int rzv2h_cpg_assert (struct reset_controller_dev * rcdev ,
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+ unsigned long id )
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+ {
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+ return __rzv2h_cpg_assert (rcdev , id , true);
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}
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static int rzv2h_cpg_deassert (struct reset_controller_dev * rcdev ,
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unsigned long id )
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{
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- struct rzv2h_cpg_priv * priv = rcdev_to_priv (rcdev );
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- unsigned int reg = GET_RST_OFFSET (priv -> resets [id ].reset_index );
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- u32 mask = BIT (priv -> resets [id ].reset_bit );
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- u8 monbit = priv -> resets [id ].mon_bit ;
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- u32 value = (mask << 16 ) | mask ;
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-
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- dev_dbg (rcdev -> dev , "deassert id:%ld offset:0x%x\n" , id , reg );
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-
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- writel (value , priv -> base + reg );
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-
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- reg = GET_RST_MON_OFFSET (priv -> resets [id ].mon_index );
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- mask = BIT (monbit );
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-
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- return readl_poll_timeout_atomic (priv -> base + reg , value ,
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- !(value & mask ), 10 , 200 );
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+ return __rzv2h_cpg_assert (rcdev , id , false);
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}
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static int rzv2h_cpg_reset (struct reset_controller_dev * rcdev ,
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