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petegriffinkrzk
petegriffin
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krzk
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pinctrl: samsung: add gs101 specific eint suspend/resume callbacks
gs101 differs to other SoCs in that fltcon1 register doesn't always exist. Additionally the offset of fltcon0 is not fixed and needs to use the newly added eint_fltcon_offset variable. Fixes: 4a8be01 ("pinctrl: samsung: Add gs101 SoC pinctrl configuration") Cc: [email protected] # depends on the previous three patches Reviewed-by: André Draszik <[email protected]> Signed-off-by: Peter Griffin <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Krzysztof Kozlowski <[email protected]>
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‎drivers/pinctrl/samsung/pinctrl-exynos-arm64.c

Lines changed: 12 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -1762,15 +1762,15 @@ static const struct samsung_pin_ctrl gs101_pin_ctrl[] __initconst = {
17621762
.pin_banks = gs101_pin_alive,
17631763
.nr_banks = ARRAY_SIZE(gs101_pin_alive),
17641764
.eint_wkup_init = exynos_eint_wkup_init,
1765-
.suspend = exynos_pinctrl_suspend,
1766-
.resume = exynos_pinctrl_resume,
1765+
.suspend = gs101_pinctrl_suspend,
1766+
.resume = gs101_pinctrl_resume,
17671767
}, {
17681768
/* pin banks of gs101 pin-controller (FAR_ALIVE) */
17691769
.pin_banks = gs101_pin_far_alive,
17701770
.nr_banks = ARRAY_SIZE(gs101_pin_far_alive),
17711771
.eint_wkup_init = exynos_eint_wkup_init,
1772-
.suspend = exynos_pinctrl_suspend,
1773-
.resume = exynos_pinctrl_resume,
1772+
.suspend = gs101_pinctrl_suspend,
1773+
.resume = gs101_pinctrl_resume,
17741774
}, {
17751775
/* pin banks of gs101 pin-controller (GSACORE) */
17761776
.pin_banks = gs101_pin_gsacore,
@@ -1784,29 +1784,29 @@ static const struct samsung_pin_ctrl gs101_pin_ctrl[] __initconst = {
17841784
.pin_banks = gs101_pin_peric0,
17851785
.nr_banks = ARRAY_SIZE(gs101_pin_peric0),
17861786
.eint_gpio_init = exynos_eint_gpio_init,
1787-
.suspend = exynos_pinctrl_suspend,
1788-
.resume = exynos_pinctrl_resume,
1787+
.suspend = gs101_pinctrl_suspend,
1788+
.resume = gs101_pinctrl_resume,
17891789
}, {
17901790
/* pin banks of gs101 pin-controller (PERIC1) */
17911791
.pin_banks = gs101_pin_peric1,
17921792
.nr_banks = ARRAY_SIZE(gs101_pin_peric1),
17931793
.eint_gpio_init = exynos_eint_gpio_init,
1794-
.suspend = exynos_pinctrl_suspend,
1795-
.resume = exynos_pinctrl_resume,
1794+
.suspend = gs101_pinctrl_suspend,
1795+
.resume = gs101_pinctrl_resume,
17961796
}, {
17971797
/* pin banks of gs101 pin-controller (HSI1) */
17981798
.pin_banks = gs101_pin_hsi1,
17991799
.nr_banks = ARRAY_SIZE(gs101_pin_hsi1),
18001800
.eint_gpio_init = exynos_eint_gpio_init,
1801-
.suspend = exynos_pinctrl_suspend,
1802-
.resume = exynos_pinctrl_resume,
1801+
.suspend = gs101_pinctrl_suspend,
1802+
.resume = gs101_pinctrl_resume,
18031803
}, {
18041804
/* pin banks of gs101 pin-controller (HSI2) */
18051805
.pin_banks = gs101_pin_hsi2,
18061806
.nr_banks = ARRAY_SIZE(gs101_pin_hsi2),
18071807
.eint_gpio_init = exynos_eint_gpio_init,
1808-
.suspend = exynos_pinctrl_suspend,
1809-
.resume = exynos_pinctrl_resume,
1808+
.suspend = gs101_pinctrl_suspend,
1809+
.resume = gs101_pinctrl_resume,
18101810
},
18111811
};
18121812

‎drivers/pinctrl/samsung/pinctrl-exynos.c

Lines changed: 71 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -800,6 +800,41 @@ void exynos_pinctrl_suspend(struct samsung_pin_bank *bank)
800800
}
801801
}
802802

803+
void gs101_pinctrl_suspend(struct samsung_pin_bank *bank)
804+
{
805+
struct exynos_eint_gpio_save *save = bank->soc_priv;
806+
const void __iomem *regs = bank->eint_base;
807+
808+
if (bank->eint_type == EINT_TYPE_GPIO) {
809+
save->eint_con = readl(regs + EXYNOS_GPIO_ECON_OFFSET
810+
+ bank->eint_offset);
811+
812+
save->eint_fltcon0 = readl(regs + EXYNOS_GPIO_EFLTCON_OFFSET
813+
+ bank->eint_fltcon_offset);
814+
815+
/* fltcon1 register only exists for pins 4-7 */
816+
if (bank->nr_pins > 4)
817+
save->eint_fltcon1 = readl(regs +
818+
EXYNOS_GPIO_EFLTCON_OFFSET
819+
+ bank->eint_fltcon_offset + 4);
820+
821+
save->eint_mask = readl(regs + bank->irq_chip->eint_mask
822+
+ bank->eint_offset);
823+
824+
pr_debug("%s: save con %#010x\n",
825+
bank->name, save->eint_con);
826+
pr_debug("%s: save fltcon0 %#010x\n",
827+
bank->name, save->eint_fltcon0);
828+
if (bank->nr_pins > 4)
829+
pr_debug("%s: save fltcon1 %#010x\n",
830+
bank->name, save->eint_fltcon1);
831+
pr_debug("%s: save mask %#010x\n",
832+
bank->name, save->eint_mask);
833+
} else if (bank->eint_type == EINT_TYPE_WKUP) {
834+
exynos_set_wakeup(bank);
835+
}
836+
}
837+
803838
void exynosautov920_pinctrl_suspend(struct samsung_pin_bank *bank)
804839
{
805840
struct exynos_eint_gpio_save *save = bank->soc_priv;
@@ -819,6 +854,42 @@ void exynosautov920_pinctrl_suspend(struct samsung_pin_bank *bank)
819854
}
820855
}
821856

857+
void gs101_pinctrl_resume(struct samsung_pin_bank *bank)
858+
{
859+
struct exynos_eint_gpio_save *save = bank->soc_priv;
860+
861+
void __iomem *regs = bank->eint_base;
862+
void __iomem *eint_fltcfg0 = regs + EXYNOS_GPIO_EFLTCON_OFFSET
863+
+ bank->eint_fltcon_offset;
864+
865+
if (bank->eint_type == EINT_TYPE_GPIO) {
866+
pr_debug("%s: con %#010x => %#010x\n", bank->name,
867+
readl(regs + EXYNOS_GPIO_ECON_OFFSET
868+
+ bank->eint_offset), save->eint_con);
869+
870+
pr_debug("%s: fltcon0 %#010x => %#010x\n", bank->name,
871+
readl(eint_fltcfg0), save->eint_fltcon0);
872+
873+
/* fltcon1 register only exists for pins 4-7 */
874+
if (bank->nr_pins > 4)
875+
pr_debug("%s: fltcon1 %#010x => %#010x\n", bank->name,
876+
readl(eint_fltcfg0 + 4), save->eint_fltcon1);
877+
878+
pr_debug("%s: mask %#010x => %#010x\n", bank->name,
879+
readl(regs + bank->irq_chip->eint_mask
880+
+ bank->eint_offset), save->eint_mask);
881+
882+
writel(save->eint_con, regs + EXYNOS_GPIO_ECON_OFFSET
883+
+ bank->eint_offset);
884+
writel(save->eint_fltcon0, eint_fltcfg0);
885+
886+
if (bank->nr_pins > 4)
887+
writel(save->eint_fltcon1, eint_fltcfg0 + 4);
888+
writel(save->eint_mask, regs + bank->irq_chip->eint_mask
889+
+ bank->eint_offset);
890+
}
891+
}
892+
822893
void exynos_pinctrl_resume(struct samsung_pin_bank *bank)
823894
{
824895
struct exynos_eint_gpio_save *save = bank->soc_priv;

‎drivers/pinctrl/samsung/pinctrl-exynos.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -244,6 +244,8 @@ void exynosautov920_pinctrl_resume(struct samsung_pin_bank *bank);
244244
void exynosautov920_pinctrl_suspend(struct samsung_pin_bank *bank);
245245
void exynos_pinctrl_suspend(struct samsung_pin_bank *bank);
246246
void exynos_pinctrl_resume(struct samsung_pin_bank *bank);
247+
void gs101_pinctrl_suspend(struct samsung_pin_bank *bank);
248+
void gs101_pinctrl_resume(struct samsung_pin_bank *bank);
247249
struct samsung_retention_ctrl *
248250
exynos_retention_init(struct samsung_pinctrl_drv_data *drvdata,
249251
const struct samsung_retention_data *data);

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