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Merge tag 'amd-drm-fixes-6.16-2025-07-01' of https://gitlab.freedesktop.org/agd5f/linux into drm-fixes
amd-drm-fixes-6.16-2025-07-01: amdgpu: - SDMA 5.x reset fix - Add missing firmware declaration - Fix leak in amdgpu_ctx_mgr_entity_fini() - Freesync fix - OLED backlight fix amdkfd: - mtype fix for ext coherent system memory - MMU notifier fix - gfx7/8 fix Signed-off-by: Dave Airlie <[email protected]> From: Alex Deucher <[email protected]> Link: https://lore.kernel.org/r/[email protected]
2 parents d0b3b7b + 39d8145 commit bf906c9

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+67
-31
lines changed

10 files changed

+67
-31
lines changed

‎drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v7.c

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -561,6 +561,13 @@ static uint32_t read_vmid_from_vmfault_reg(struct amdgpu_device *adev)
561561
return REG_GET_FIELD(status, VM_CONTEXT1_PROTECTION_FAULT_STATUS, VMID);
562562
}
563563

564+
static uint32_t kgd_hqd_sdma_get_doorbell(struct amdgpu_device *adev,
565+
int engine, int queue)
566+
567+
{
568+
return 0;
569+
}
570+
564571
const struct kfd2kgd_calls gfx_v7_kfd2kgd = {
565572
.program_sh_mem_settings = kgd_program_sh_mem_settings,
566573
.set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
@@ -578,4 +585,5 @@ const struct kfd2kgd_calls gfx_v7_kfd2kgd = {
578585
.set_scratch_backing_va = set_scratch_backing_va,
579586
.set_vm_context_page_table_base = set_vm_context_page_table_base,
580587
.read_vmid_from_vmfault_reg = read_vmid_from_vmfault_reg,
588+
.hqd_sdma_get_doorbell = kgd_hqd_sdma_get_doorbell,
581589
};

‎drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gfx_v8.c

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -582,6 +582,13 @@ static void set_vm_context_page_table_base(struct amdgpu_device *adev,
582582
lower_32_bits(page_table_base));
583583
}
584584

585+
static uint32_t kgd_hqd_sdma_get_doorbell(struct amdgpu_device *adev,
586+
int engine, int queue)
587+
588+
{
589+
return 0;
590+
}
591+
585592
const struct kfd2kgd_calls gfx_v8_kfd2kgd = {
586593
.program_sh_mem_settings = kgd_program_sh_mem_settings,
587594
.set_pasid_vmid_mapping = kgd_set_pasid_vmid_mapping,
@@ -599,4 +606,5 @@ const struct kfd2kgd_calls gfx_v8_kfd2kgd = {
599606
get_atc_vmid_pasid_mapping_info,
600607
.set_scratch_backing_va = set_scratch_backing_va,
601608
.set_vm_context_page_table_base = set_vm_context_page_table_base,
609+
.hqd_sdma_get_doorbell = kgd_hqd_sdma_get_doorbell,
602610
};

‎drivers/gpu/drm/amd/amdgpu/amdgpu_ctx.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -944,6 +944,7 @@ static void amdgpu_ctx_mgr_entity_fini(struct amdgpu_ctx_mgr *mgr)
944944
drm_sched_entity_fini(entity);
945945
}
946946
}
947+
kref_put(&ctx->refcount, amdgpu_ctx_fini);
947948
}
948949
}
949950

‎drivers/gpu/drm/amd/amdgpu/sdma_v4_4_2.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,7 @@
4545
#include "amdgpu_ras.h"
4646

4747
MODULE_FIRMWARE("amdgpu/sdma_4_4_2.bin");
48+
MODULE_FIRMWARE("amdgpu/sdma_4_4_4.bin");
4849
MODULE_FIRMWARE("amdgpu/sdma_4_4_5.bin");
4950

5051
static const struct amdgpu_hwip_reg_entry sdma_reg_list_4_4_2[] = {

‎drivers/gpu/drm/amd/amdgpu/sdma_v5_0.c

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1543,8 +1543,13 @@ static int sdma_v5_0_reset_queue(struct amdgpu_ring *ring, unsigned int vmid)
15431543
{
15441544
struct amdgpu_device *adev = ring->adev;
15451545
u32 inst_id = ring->me;
1546+
int r;
1547+
1548+
amdgpu_amdkfd_suspend(adev, true);
1549+
r = amdgpu_sdma_reset_engine(adev, inst_id);
1550+
amdgpu_amdkfd_resume(adev, true);
15461551

1547-
return amdgpu_sdma_reset_engine(adev, inst_id);
1552+
return r;
15481553
}
15491554

15501555
static int sdma_v5_0_stop_queue(struct amdgpu_ring *ring)

‎drivers/gpu/drm/amd/amdgpu/sdma_v5_2.c

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1456,8 +1456,13 @@ static int sdma_v5_2_reset_queue(struct amdgpu_ring *ring, unsigned int vmid)
14561456
{
14571457
struct amdgpu_device *adev = ring->adev;
14581458
u32 inst_id = ring->me;
1459+
int r;
1460+
1461+
amdgpu_amdkfd_suspend(adev, true);
1462+
r = amdgpu_sdma_reset_engine(adev, inst_id);
1463+
amdgpu_amdkfd_resume(adev, true);
14591464

1460-
return amdgpu_sdma_reset_engine(adev, inst_id);
1465+
return r;
14611466
}
14621467

14631468
static int sdma_v5_2_stop_queue(struct amdgpu_ring *ring)

‎drivers/gpu/drm/amd/amdkfd/kfd_svm.c

Lines changed: 21 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -1171,13 +1171,12 @@ svm_range_split_head(struct svm_range *prange, uint64_t new_start,
11711171
}
11721172

11731173
static void
1174-
svm_range_add_child(struct svm_range *prange, struct mm_struct *mm,
1175-
struct svm_range *pchild, enum svm_work_list_ops op)
1174+
svm_range_add_child(struct svm_range *prange, struct svm_range *pchild, enum svm_work_list_ops op)
11761175
{
11771176
pr_debug("add child 0x%p [0x%lx 0x%lx] to prange 0x%p child list %d\n",
11781177
pchild, pchild->start, pchild->last, prange, op);
11791178

1180-
pchild->work_item.mm = mm;
1179+
pchild->work_item.mm = NULL;
11811180
pchild->work_item.op = op;
11821181
list_add_tail(&pchild->child_list, &prange->child_list);
11831182
}
@@ -1278,7 +1277,7 @@ svm_range_get_pte_flags(struct kfd_node *node,
12781277
mapping_flags |= ext_coherent ? AMDGPU_VM_MTYPE_UC : AMDGPU_VM_MTYPE_NC;
12791278
/* system memory accessed by the dGPU */
12801279
} else {
1281-
if (gc_ip_version < IP_VERSION(9, 5, 0))
1280+
if (gc_ip_version < IP_VERSION(9, 5, 0) || ext_coherent)
12821281
mapping_flags |= AMDGPU_VM_MTYPE_UC;
12831282
else
12841283
mapping_flags |= AMDGPU_VM_MTYPE_NC;
@@ -2394,15 +2393,17 @@ svm_range_add_list_work(struct svm_range_list *svms, struct svm_range *prange,
23942393
prange->work_item.op != SVM_OP_UNMAP_RANGE)
23952394
prange->work_item.op = op;
23962395
} else {
2397-
prange->work_item.op = op;
2398-
2399-
/* Pairs with mmput in deferred_list_work */
2400-
mmget(mm);
2401-
prange->work_item.mm = mm;
2402-
list_add_tail(&prange->deferred_list,
2403-
&prange->svms->deferred_range_list);
2404-
pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n",
2405-
prange, prange->start, prange->last, op);
2396+
/* Pairs with mmput in deferred_list_work.
2397+
* If process is exiting and mm is gone, don't update mmu notifier.
2398+
*/
2399+
if (mmget_not_zero(mm)) {
2400+
prange->work_item.mm = mm;
2401+
prange->work_item.op = op;
2402+
list_add_tail(&prange->deferred_list,
2403+
&prange->svms->deferred_range_list);
2404+
pr_debug("add prange 0x%p [0x%lx 0x%lx] to work list op %d\n",
2405+
prange, prange->start, prange->last, op);
2406+
}
24062407
}
24072408
spin_unlock(&svms->deferred_list_lock);
24082409
}
@@ -2416,8 +2417,7 @@ void schedule_deferred_list_work(struct svm_range_list *svms)
24162417
}
24172418

24182419
static void
2419-
svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent,
2420-
struct svm_range *prange, unsigned long start,
2420+
svm_range_unmap_split(struct svm_range *parent, struct svm_range *prange, unsigned long start,
24212421
unsigned long last)
24222422
{
24232423
struct svm_range *head;
@@ -2438,12 +2438,12 @@ svm_range_unmap_split(struct mm_struct *mm, struct svm_range *parent,
24382438
svm_range_split(tail, last + 1, tail->last, &head);
24392439

24402440
if (head != prange && tail != prange) {
2441-
svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
2442-
svm_range_add_child(parent, mm, tail, SVM_OP_ADD_RANGE);
2441+
svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE);
2442+
svm_range_add_child(parent, tail, SVM_OP_ADD_RANGE);
24432443
} else if (tail != prange) {
2444-
svm_range_add_child(parent, mm, tail, SVM_OP_UNMAP_RANGE);
2444+
svm_range_add_child(parent, tail, SVM_OP_UNMAP_RANGE);
24452445
} else if (head != prange) {
2446-
svm_range_add_child(parent, mm, head, SVM_OP_UNMAP_RANGE);
2446+
svm_range_add_child(parent, head, SVM_OP_UNMAP_RANGE);
24472447
} else if (parent != prange) {
24482448
prange->work_item.op = SVM_OP_UNMAP_RANGE;
24492449
}
@@ -2520,14 +2520,14 @@ svm_range_unmap_from_cpu(struct mm_struct *mm, struct svm_range *prange,
25202520
l = min(last, pchild->last);
25212521
if (l >= s)
25222522
svm_range_unmap_from_gpus(pchild, s, l, trigger);
2523-
svm_range_unmap_split(mm, prange, pchild, start, last);
2523+
svm_range_unmap_split(prange, pchild, start, last);
25242524
mutex_unlock(&pchild->lock);
25252525
}
25262526
s = max(start, prange->start);
25272527
l = min(last, prange->last);
25282528
if (l >= s)
25292529
svm_range_unmap_from_gpus(prange, s, l, trigger);
2530-
svm_range_unmap_split(mm, prange, prange, start, last);
2530+
svm_range_unmap_split(prange, prange, start, last);
25312531

25322532
if (unmap_parent)
25332533
svm_range_add_list_work(svms, prange, mm, SVM_OP_UNMAP_RANGE);
@@ -2570,8 +2570,6 @@ svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
25702570

25712571
if (range->event == MMU_NOTIFY_RELEASE)
25722572
return true;
2573-
if (!mmget_not_zero(mni->mm))
2574-
return true;
25752573

25762574
start = mni->interval_tree.start;
25772575
last = mni->interval_tree.last;
@@ -2598,7 +2596,6 @@ svm_range_cpu_invalidate_pagetables(struct mmu_interval_notifier *mni,
25982596
}
25992597

26002598
svm_range_unlock(prange);
2601-
mmput(mni->mm);
26022599

26032600
return true;
26042601
}

‎drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c

Lines changed: 7 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -3610,13 +3610,15 @@ static void update_connector_ext_caps(struct amdgpu_dm_connector *aconnector)
36103610

36113611
luminance_range = &conn_base->display_info.luminance_range;
36123612

3613-
if (luminance_range->max_luminance) {
3614-
caps->aux_min_input_signal = luminance_range->min_luminance;
3613+
if (luminance_range->max_luminance)
36153614
caps->aux_max_input_signal = luminance_range->max_luminance;
3616-
} else {
3617-
caps->aux_min_input_signal = 0;
3615+
else
36183616
caps->aux_max_input_signal = 512;
3619-
}
3617+
3618+
if (luminance_range->min_luminance)
3619+
caps->aux_min_input_signal = luminance_range->min_luminance;
3620+
else
3621+
caps->aux_min_input_signal = 1;
36203622

36213623
min_input_signal_override = drm_get_panel_min_brightness_quirk(aconnector->drm_edid);
36223624
if (min_input_signal_override >= 0)

‎drivers/gpu/drm/amd/display/dc/dc_hw_types.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -974,6 +974,7 @@ struct dc_crtc_timing {
974974
uint32_t pix_clk_100hz;
975975

976976
uint32_t min_refresh_in_uhz;
977+
uint32_t max_refresh_in_uhz;
977978

978979
uint32_t vic;
979980
uint32_t hdmi_vic;

‎drivers/gpu/drm/amd/display/modules/freesync/freesync.c

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -155,6 +155,14 @@ unsigned int mod_freesync_calc_v_total_from_refresh(
155155
v_total = div64_u64(div64_u64(((unsigned long long)(
156156
frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)),
157157
stream->timing.h_total), 1000000);
158+
} else if (refresh_in_uhz >= stream->timing.max_refresh_in_uhz) {
159+
/* When the target refresh rate is the maximum panel refresh rate
160+
* round up the vtotal value to prevent off-by-one error causing
161+
* v_total_min to be below the panel's lower bound
162+
*/
163+
v_total = div64_u64(div64_u64(((unsigned long long)(
164+
frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)),
165+
stream->timing.h_total) + (1000000 - 1), 1000000);
158166
} else {
159167
v_total = div64_u64(div64_u64(((unsigned long long)(
160168
frame_duration_in_ns) * (stream->timing.pix_clk_100hz / 10)),

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