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Alexei Starovoitov
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Merge branch 'bpf-next/master' into for-next
Signed-off-by: Alexei Starovoitov <[email protected]>
2 parents 41af159 + 886178a commit dc589f9

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.mailmap

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@@ -21,7 +21,8 @@ Adam Radford <[email protected]>
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Adrian Bunk <[email protected]>
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Aleksandar Markovic <[email protected]> <[email protected]>
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Ashok Raj Nagarajan <[email protected]> <[email protected]>
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Avaneesh Kumar Dwivedi <[email protected]> <[email protected]>
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Axel Dyks <[email protected]>
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@@ -195,6 +197,7 @@ Daniel Borkmann <[email protected]> <[email protected]>
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David Brownell <[email protected]>
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@@ -280,6 +283,7 @@ Gustavo Padovan <[email protected]>
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Gustavo Padovan <[email protected]>
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@@ -424,6 +428,9 @@ Krzysztof Wilczyński <[email protected]> <[email protected]>
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Krzysztof Wilczyński <[email protected]> <[email protected]>
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Kuninori Morimoto <[email protected]>
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@@ -600,6 +607,12 @@ Paul Mackerras <[email protected]> <[email protected]>
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Pavankumar Kondeti <[email protected]> <[email protected]>
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Peter A Jonsson <[email protected]>
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Peter Oruba <[email protected]>
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Sharath Chandra Vurukala <[email protected]> <[email protected]>
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Stanislav Fomichev <[email protected]> <[email protected]>
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Stanislav Fomichev <[email protected]> <[email protected]>
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Stéphane Witzmann <[email protected]>
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CREDITS

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S: Potsdam, New York 13676
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S: USA
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N: Shannon Nelson
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D: Worked on several network drivers including
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D: ixgbe, i40e, ionic, pds_core, pds_vdpa, pds_fwctl
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N: Dave Neuer
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D: Helped implement support for Compaq's H31xx series iPAQs

Documentation/ABI/testing/sysfs-bus-iio

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@@ -94,6 +94,7 @@ Description:
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What: /sys/bus/iio/devices/iio:deviceX/sampling_frequency
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What: /sys/bus/iio/devices/iio:deviceX/in_intensity_sampling_frequency
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What: /sys/bus/iio/devices/iio:deviceX/buffer/sampling_frequency
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What: /sys/bus/iio/devices/iio:deviceX/events/sampling_frequency
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What: /sys/bus/iio/devices/triggerX/sampling_frequency
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KernelVersion: 2.6.35
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@@ -740,7 +741,9 @@ Description:
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1kohm_to_gnd: connected to ground via an 1kOhm resistor,
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2.5kohm_to_gnd: connected to ground via a 2.5kOhm resistor,
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6kohm_to_gnd: connected to ground via a 6kOhm resistor,
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7.7kohm_to_gnd: connected to ground via a 7.7kOhm resistor,
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20kohm_to_gnd: connected to ground via a 20kOhm resistor,
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32kohm_to_gnd: connected to ground via a 32kOhm resistor,
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42kohm_to_gnd: connected to ground via a 42kOhm resistor,
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90kohm_to_gnd: connected to ground via a 90kOhm resistor,
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100kohm_to_gnd: connected to ground via an 100kOhm resistor,

Documentation/ABI/testing/sysfs-driver-intel-m10-bmc

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@@ -17,7 +17,7 @@ Description: Read only. Returns the firmware version of Intel MAX10
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What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_address
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Date: January 2021
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KernelVersion: 5.12
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Contact: Peter Colberg <peter.colberg@altera.com>
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Contact: Matthew Gerlach <matthew.gerlach@altera.com>
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Description: Read only. Returns the first MAC address in a block
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of sequential MAC addresses assigned to the board
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that is managed by the Intel MAX10 BMC. It is stored in
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What: /sys/bus/.../drivers/intel-m10-bmc/.../mac_count
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Date: January 2021
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KernelVersion: 5.12
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Contact: Peter Colberg <peter.colberg@altera.com>
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Contact: Matthew Gerlach <matthew.gerlach@altera.com>
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Description: Read only. Returns the number of sequential MAC
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addresses assigned to the board managed by the Intel
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MAX10 BMC. This value is stored in FLASH and is mirrored
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What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_root_entry_hash
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Date: Sep 2022
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KernelVersion: 5.20
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Contact: Peter Colberg <peter.colberg@altera.com>
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Contact: Matthew Gerlach <matthew.gerlach@altera.com>
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Description: Read only. Returns the root entry hash for the static
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region if one is programmed, else it returns the
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string: "hash not programmed". This file is only
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What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_root_entry_hash
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KernelVersion: 5.20
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Contact: Peter Colberg <peter.colberg@altera.com>
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Contact: Matthew Gerlach <matthew.gerlach@altera.com>
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Description: Read only. Returns the root entry hash for the partial
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reconfiguration region if one is programmed, else it
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returns the string: "hash not programmed". This file
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What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/bmc_root_entry_hash
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Date: Sep 2022
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Contact: Peter Colberg <peter.colberg@altera.com>
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Contact: Matthew Gerlach <matthew.gerlach@altera.com>
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Description: Read only. Returns the root entry hash for the BMC image
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if one is programmed, else it returns the string:
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"hash not programmed". This file is only visible if the
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What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/sr_canceled_csks
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Date: Sep 2022
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Contact: Peter Colberg <peter.colberg@altera.com>
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Contact: Matthew Gerlach <matthew.gerlach@altera.com>
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Description: Read only. Returns a list of indices for canceled code
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signing keys for the static region. The standard bitmap
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list format is used (e.g. "1,2-6,9").
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What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/pr_canceled_csks
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Description: Read only. Returns a list of indices for canceled code
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signing keys for the partial reconfiguration region. The
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standard bitmap list format is used (e.g. "1,2-6,9").
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Description: Read only. Returns a list of indices for canceled code
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signing keys for the BMC. The standard bitmap list format
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is used (e.g. "1,2-6,9").
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What: /sys/bus/platform/drivers/intel-m10bmc-sec-update/.../security/flash_count
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Description: Read only. Returns number of times the secure update
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staging area has been flashed.
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Format: "%u".

Documentation/ABI/testing/sysfs-driver-intel-xe-hwmon

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Only supported for particular Intel Xe graphics platforms.
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What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power2_crit
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What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/power1_crit
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Date: May 2025
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KernelVersion: 6.15
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Description: RW. Package reactive critical (I1) power limit in microwatts.
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Description: RW. Card reactive critical (I1) power limit in microwatts.
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Package reactive critical (I1) power limit in microwatts is exposed
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Card reactive critical (I1) power limit in microwatts is exposed
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for client products. The power controller will throttle the
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operating frequency if the power averaged over a window exceeds
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this limit.
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Only supported for particular Intel Xe graphics platforms.
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What: /sys/bus/pci/drivers/xe/.../hwmon/hwmon<i>/curr2_crit
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Date: May 2025
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KernelVersion: 6.15
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Description: RW. Package reactive critical (I1) power limit in milliamperes.
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Description: RW. Card reactive critical (I1) power limit in milliamperes.
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Package reactive critical (I1) power limit in milliamperes is
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Card reactive critical (I1) power limit in milliamperes is
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exposed for server products. The power controller will throttle
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the operating frequency if the power averaged over a window
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exceeds this limit.

Documentation/admin-guide/cifs/usage.rst

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illegal Windows/NTFS/SMB characters to a remap range (this mount parameter
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is the default for SMB3). This remap (``mapposix``) range is also
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compatible with Mac (and "Services for Mac" on some older Windows).
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When POSIX Extensions for SMB 3.1.1 are negotiated, remapping is automatically
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disabled.
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CIFS VFS Mount Options
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======================

Documentation/admin-guide/thunderbolt.rst

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To recover from this mode, one needs to flash a valid NVM image to the
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host controller in the same way it is done in the previous chapter.
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Tunneling events
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----------------
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The driver sends ``KOBJ_CHANGE`` events to userspace when there is a
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tunneling change in the ``thunderbolt_domain``. The notification carries
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following environment variables::
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TUNNEL_EVENT=<EVENT>
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TUNNEL_DETAILS=0:12 <-> 1:20 (USB3)
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Possible values for ``<EVENT>`` are:
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activated
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The tunnel was activated (created).
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changed
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There is a change in this tunnel. For example bandwidth allocation was
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changed.
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deactivated
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The tunnel was torn down.
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low bandwidth
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The tunnel is not getting optimal bandwidth.
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insufficient bandwidth
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There is not enough bandwidth for the current tunnel requirements.
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The ``TUNNEL_DETAILS`` is only provided if the tunnel is known. For
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example, in case of Firmware Connection Manager this is missing or does
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not provide full tunnel information. In case of Software Connection Manager
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this includes full tunnel details. The format currently matches what the
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driver uses when logging. This may change over time.
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Networking over Thunderbolt cable
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Thunderbolt technology allows software communication between two hosts

Documentation/arch/arm64/booting.rst

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- ICC.SRE_EL2.Enable (bit 3) must be initialised to 0b1
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- ICC_SRE_EL2.Enable (bit 3) must be initialised to 0b1
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Documentation/arch/riscv/cmodx.rst

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program must enforce its own synchronization with the unprivileged fence.i
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However, the default Linux ABI prohibits the use of fence.i in userspace
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applications. At any point the scheduler may migrate a task onto a new hart. If
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migration occurs after the userspace synchronized the icache and instruction
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storage with fence.i, the icache on the new hart will no longer be clean. This
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is due to the behavior of fence.i only affecting the hart that it is called on.
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Thus, the hart that the task has been migrated to may not have synchronized
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instruction storage and icache.
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CMODX in the Kernel Space
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-------------------------
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Dynamic ftrace
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---------------------
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Essentially, dynamic ftrace directs the control flow by inserting a function
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call at each patchable function entry, and patches it dynamically at runtime to
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enable or disable the redirection. In the case of RISC-V, 2 instructions,
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AUIPC + JALR, are required to compose a function call. However, it is impossible
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to patch 2 instructions and expect that a concurrent read-side executes them
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without a race condition. This series makes atmoic code patching possible in
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RISC-V ftrace. Kernel preemption makes things even worse as it allows the old
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state to persist across the patching process with stop_machine().
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In order to get rid of stop_machine() and run dynamic ftrace with full kernel
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preemption, we partially initialize each patchable function entry at boot-time,
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setting the first instruction to AUIPC, and the second to NOP. Now, atmoic
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patching is possible because the kernel only has to update one instruction.
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According to Ziccif, as long as an instruction is naturally aligned, the ISA
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guarantee an atomic update.
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By fixing down the first instruction, AUIPC, the range of the ftrace trampoline
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is limited to +-2K from the predetermined target, ftrace_caller, due to the lack
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of immediate encoding space in RISC-V. To address the issue, we introduce
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CALL_OPS, where an 8B naturally align metadata is added in front of each
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pacthable function. The metadata is resolved at the first trampoline, then the
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execution can be derect to another custom trampoline.
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CMODX in the User Space
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-----------------------
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Though fence.i is an unprivileged instruction, the default Linux ABI prohibits
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the use of fence.i in userspace applications. At any point the scheduler may
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migrate a task onto a new hart. If migration occurs after the userspace
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synchronized the icache and instruction storage with fence.i, the icache on the
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new hart will no longer be clean. This is due to the behavior of fence.i only
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affecting the hart that it is called on. Thus, the hart that the task has been
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migrated to may not have synchronized instruction storage and icache.
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There are two ways to solve this problem: use the riscv_flush_icache() syscall,
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or use the ``PR_RISCV_SET_ICACHE_FLUSH_CTX`` prctl() and emit fence.i in

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