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Merge tag 'x86-urgent-2025-11-01' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull misc x86 fixes from Ingo Molnar: - Limit AMD microcode Entrysign sha256 signature checking to known CPU generations - Disable AMD RDSEED32 on certain Zen5 CPUs that have a microcode version before when the microcode-based fix was issued for the AMD-SB-7055 erratum - Fix FPU AMD XFD state synchronization on signal delivery - Fix (work around) a SSE4a-disassembly related build failure on X86_NATIVE_CPU=y builds - Extend the AMD Zen6 model space with a new range of models - Fix <asm/intel-family.h> CPU model comments - Fix the CONFIG_CFI=y and CONFIG_LTO_CLANG_FULL=y build, which was unhappy due to missing kCFI type annotations of clear_page() variants * tag 'x86-urgent-2025-11-01' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/mm: Ensure clear_page() variants always have __kcfi_typeid_ symbols x86/cpu: Add/fix core comments for {Panther,Nova} Lake x86/CPU/AMD: Extend Zen6 model range x86/build: Disable SSE4a x86/fpu: Ensure XFD state on signal delivery x86/CPU/AMD: Add RDSEED fix for Zen5 x86/microcode/AMD: Limit Entrysign signature checking to known generations
2 parents f9bc8e0 + 9b041a4 commit e3e0141

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arch/x86/Makefile

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -75,7 +75,7 @@ export BITS
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#
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# https://gcc.gnu.org/bugzilla/show_bug.cgi?id=53383
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#
78-
KBUILD_CFLAGS += -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx
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KBUILD_CFLAGS += -mno-sse -mno-mmx -mno-sse2 -mno-3dnow -mno-avx -mno-sse4a
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KBUILD_RUSTFLAGS += --target=$(objtree)/scripts/target.json
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KBUILD_RUSTFLAGS += -Ctarget-feature=-sse,-sse2,-sse3,-ssse3,-sse4.1,-sse4.2,-avx,-avx2
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arch/x86/include/asm/intel-family.h

Lines changed: 3 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -150,12 +150,12 @@
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#define INTEL_LUNARLAKE_M IFM(6, 0xBD) /* Lion Cove / Skymont */
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153-
#define INTEL_PANTHERLAKE_L IFM(6, 0xCC) /* Cougar Cove / Crestmont */
153+
#define INTEL_PANTHERLAKE_L IFM(6, 0xCC) /* Cougar Cove / Darkmont */
154154

155155
#define INTEL_WILDCATLAKE_L IFM(6, 0xD5)
156156

157-
#define INTEL_NOVALAKE IFM(18, 0x01)
158-
#define INTEL_NOVALAKE_L IFM(18, 0x03)
157+
#define INTEL_NOVALAKE IFM(18, 0x01) /* Coyote Cove / Arctic Wolf */
158+
#define INTEL_NOVALAKE_L IFM(18, 0x03) /* Coyote Cove / Arctic Wolf */
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160160
/* "Small Core" Processors (Atom/E-Core) */
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arch/x86/include/asm/page_64.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -43,6 +43,9 @@ extern unsigned long __phys_addr_symbol(unsigned long);
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void clear_page_orig(void *page);
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void clear_page_rep(void *page);
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void clear_page_erms(void *page);
46+
KCFI_REFERENCE(clear_page_orig);
47+
KCFI_REFERENCE(clear_page_rep);
48+
KCFI_REFERENCE(clear_page_erms);
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4750
static inline void clear_page(void *page)
4851
{

arch/x86/kernel/cpu/amd.c

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -516,7 +516,7 @@ static void bsp_init_amd(struct cpuinfo_x86 *c)
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setup_force_cpu_cap(X86_FEATURE_ZEN5);
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break;
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case 0x50 ... 0x5f:
519-
case 0x90 ... 0xaf:
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case 0x80 ... 0xaf:
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case 0xc0 ... 0xcf:
521521
setup_force_cpu_cap(X86_FEATURE_ZEN6);
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break;
@@ -1035,8 +1035,18 @@ static void init_amd_zen4(struct cpuinfo_x86 *c)
10351035
}
10361036
}
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1038+
static const struct x86_cpu_id zen5_rdseed_microcode[] = {
1039+
ZEN_MODEL_STEP_UCODE(0x1a, 0x02, 0x1, 0x0b00215a),
1040+
ZEN_MODEL_STEP_UCODE(0x1a, 0x11, 0x0, 0x0b101054),
1041+
};
1042+
10381043
static void init_amd_zen5(struct cpuinfo_x86 *c)
10391044
{
1045+
if (!x86_match_min_microcode_rev(zen5_rdseed_microcode)) {
1046+
clear_cpu_cap(c, X86_FEATURE_RDSEED);
1047+
msr_clear_bit(MSR_AMD64_CPUID_FN_7, 18);
1048+
pr_emerg_once("RDSEED32 is broken. Disabling the corresponding CPUID bit.\n");
1049+
}
10401050
}
10411051

10421052
static void init_amd(struct cpuinfo_x86 *c)

arch/x86/kernel/cpu/microcode/amd.c

Lines changed: 19 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -233,13 +233,31 @@ static bool need_sha_check(u32 cur_rev)
233233
return true;
234234
}
235235

236+
static bool cpu_has_entrysign(void)
237+
{
238+
unsigned int fam = x86_family(bsp_cpuid_1_eax);
239+
unsigned int model = x86_model(bsp_cpuid_1_eax);
240+
241+
if (fam == 0x17 || fam == 0x19)
242+
return true;
243+
244+
if (fam == 0x1a) {
245+
if (model <= 0x2f ||
246+
(0x40 <= model && model <= 0x4f) ||
247+
(0x60 <= model && model <= 0x6f))
248+
return true;
249+
}
250+
251+
return false;
252+
}
253+
236254
static bool verify_sha256_digest(u32 patch_id, u32 cur_rev, const u8 *data, unsigned int len)
237255
{
238256
struct patch_digest *pd = NULL;
239257
u8 digest[SHA256_DIGEST_SIZE];
240258
int i;
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242-
if (x86_family(bsp_cpuid_1_eax) < 0x17)
260+
if (!cpu_has_entrysign())
243261
return true;
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245263
if (!need_sha_check(cur_rev))

arch/x86/kernel/fpu/core.c

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -825,6 +825,9 @@ void fpu__clear_user_states(struct fpu *fpu)
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!fpregs_state_valid(fpu, smp_processor_id()))
826826
os_xrstor_supervisor(fpu->fpstate);
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828+
/* Ensure XFD state is in sync before reloading XSTATE */
829+
xfd_update_state(fpu->fpstate);
830+
828831
/* Reset user states in registers. */
829832
restore_fpregs_from_init_fpstate(XFEATURE_MASK_USER_RESTORE);
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