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Merge tag 'dmaengine-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine
Pull dmaengine updates from Vinod Koul: "A couple of new device support and small driver updates for this round. New support: - Intel idxd Wildcat Lake family support - SpacemiT K1 PDMA controller support - Renesas RZ/G3E family support Updates: - Xilinx shutdown support and dma client properties update - Designware edma callback_result support" * tag 'dmaengine-6.18-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/vkoul/dmaengine: dt-bindings: dma: rz-dmac: Document RZ/G3E family of SoCs dmaengine: dw-edma: Set status for callback_result dmaengine: mv_xor: match alloc_wc and free_wc dmaengine: mmp_pdma: Add SpacemiT K1 PDMA support with 64-bit addressing dmaengine: mmp_pdma: Add operations structure for controller abstraction dmaengine: mmp_pdma: Add reset controller support dmaengine: mmp_pdma: Add clock support dt-bindings: dma: Add SpacemiT K1 PDMA controller dt-bindings: dmaengine: xilinx_dma: Remove DMA client properties dmaengine: Fix dma_async_tx_descriptor->tx_submit documentation dmaengine: xilinx_dma: Support descriptor setup from dma_vecs dmaengine: sh: setup_xref error handling dmaengine: Replace zero-length array with flexible-array dmaengine: ppc4xx: Remove space before newline dmaengine: idxd: Add a new IAA device ID for Wildcat Lake family platforms dmaengine: idxd: Replace memset(0) + strscpy() with strscpy_pad() dt-bindings: dma: nvidia,tegra20-apbdma: Add undocumented compatibles and "clock-names" dmaengine: zynqmp_dma: Add shutdown operation support
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Documentation/devicetree/bindings/dma/nvidia,tegra20-apbdma.yaml

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,10 +18,17 @@ maintainers:
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properties:
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compatible:
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oneOf:
21-
- const: nvidia,tegra20-apbdma
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- enum:
22+
- nvidia,tegra114-apbdma
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- nvidia,tegra20-apbdma
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- items:
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- const: nvidia,tegra30-apbdma
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- const: nvidia,tegra20-apbdma
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- items:
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- enum:
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- nvidia,tegra124-apbdma
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- nvidia,tegra210-apbdma
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- const: nvidia,tegra148-apbdma
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reg:
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maxItems: 1
@@ -32,6 +39,9 @@ properties:
3239
clocks:
3340
maxItems: 1
3441

42+
clock-names:
43+
const: dma
44+
3545
interrupts:
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description:
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Should contain all of the per-channel DMA interrupts in

Documentation/devicetree/bindings/dma/renesas,rz-dmac.yaml

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@@ -21,6 +21,11 @@ properties:
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- renesas,r9a08g045-dmac # RZ/G3S
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- const: renesas,rz-dmac
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24+
- items:
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- enum:
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- renesas,r9a09g047-dmac # RZ/G3E
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- const: renesas,r9a09g057-dmac
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- const: renesas,r9a09g057-dmac # RZ/V2H(P)
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reg:
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@@ -0,0 +1,68 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2+
%YAML 1.2
3+
---
4+
$id: http://devicetree.org/schemas/dma/spacemit,k1-pdma.yaml#
5+
$schema: http://devicetree.org/meta-schemas/core.yaml#
6+
7+
title: SpacemiT K1 PDMA Controller
8+
9+
maintainers:
10+
- Guodong Xu <[email protected]>
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allOf:
13+
- $ref: dma-controller.yaml#
14+
15+
properties:
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compatible:
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const: spacemit,k1-pdma
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19+
reg:
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maxItems: 1
21+
22+
interrupts:
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description: Shared interrupt for all DMA channels
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maxItems: 1
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clocks:
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maxItems: 1
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resets:
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maxItems: 1
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dma-channels:
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maximum: 16
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'#dma-cells':
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const: 1
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description:
38+
The DMA request number for the peripheral device.
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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- resets
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- dma-channels
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- '#dma-cells'
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unevaluatedProperties: false
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examples:
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- |
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#include <dt-bindings/clock/spacemit,k1-syscon.h>
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soc {
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#address-cells = <2>;
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#size-cells = <2>;
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dma-controller@d4000000 {
60+
compatible = "spacemit,k1-pdma";
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reg = <0x0 0xd4000000 0x0 0x4000>;
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interrupts = <72>;
63+
clocks = <&syscon_apmu CLK_DMA>;
64+
resets = <&syscon_apmu RESET_DMA>;
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dma-channels = <16>;
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#dma-cells = <1>;
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};
68+
};

Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt

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@@ -109,26 +109,3 @@ axi_vdma_0: axivdma@40030000 {
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xlnx,datawidth = <0x40>;
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} ;
111111
} ;
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* DMA client
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Required properties:
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- dmas: a list of <[Video DMA device phandle] [Channel ID]> pairs,
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where Channel ID is '0' for write/tx and '1' for read/rx
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channel. For MCMDA, MM2S channel(write/tx) ID start from
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'0' and is in [0-15] range. S2MM channel(read/rx) ID start
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from '16' and is in [16-31] range. These channels ID are
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fixed irrespective of IP configuration.
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- dma-names: a list of DMA channel names, one per "dmas" entry
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Example:
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++++++++
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vdmatest_0: vdmatest@0 {
130-
compatible ="xlnx,axi-vdma-test-1.00.a";
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dmas = <&axi_vdma_0 0
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&axi_vdma_0 1>;
133-
dma-names = "vdma0", "vdma1";
134-
} ;

drivers/dma/Kconfig

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Original file line numberDiff line numberDiff line change
@@ -450,7 +450,7 @@ config MILBEAUT_XDMAC
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451451
config MMP_PDMA
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tristate "MMP PDMA support"
453-
depends on ARCH_MMP || ARCH_PXA || COMPILE_TEST
453+
depends on ARCH_MMP || ARCH_PXA || ARCH_SPACEMIT || COMPILE_TEST
454454
select DMA_ENGINE
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help
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Support the MMP PDMA engine for PXA and MMP platform.

drivers/dma/dw-edma/dw-edma-core.c

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@@ -584,6 +584,25 @@ dw_edma_device_prep_interleaved_dma(struct dma_chan *dchan,
584584
return dw_edma_device_transfer(&xfer);
585585
}
586586

587+
static void dw_hdma_set_callback_result(struct virt_dma_desc *vd,
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enum dmaengine_tx_result result)
589+
{
590+
u32 residue = 0;
591+
struct dw_edma_desc *desc;
592+
struct dmaengine_result *res;
593+
594+
if (!vd->tx.callback_result)
595+
return;
596+
597+
desc = vd2dw_edma_desc(vd);
598+
if (desc)
599+
residue = desc->alloc_sz - desc->xfer_sz;
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601+
res = &vd->tx_result;
602+
res->result = result;
603+
res->residue = residue;
604+
}
605+
587606
static void dw_edma_done_interrupt(struct dw_edma_chan *chan)
588607
{
589608
struct dw_edma_desc *desc;
@@ -597,6 +616,8 @@ static void dw_edma_done_interrupt(struct dw_edma_chan *chan)
597616
case EDMA_REQ_NONE:
598617
desc = vd2dw_edma_desc(vd);
599618
if (!desc->chunks_alloc) {
619+
dw_hdma_set_callback_result(vd,
620+
DMA_TRANS_NOERROR);
600621
list_del(&vd->node);
601622
vchan_cookie_complete(vd);
602623
}
@@ -633,6 +654,7 @@ static void dw_edma_abort_interrupt(struct dw_edma_chan *chan)
633654
spin_lock_irqsave(&chan->vc.lock, flags);
634655
vd = vchan_next_desc(&chan->vc);
635656
if (vd) {
657+
dw_hdma_set_callback_result(vd, DMA_TRANS_ABORTED);
636658
list_del(&vd->node);
637659
vchan_cookie_complete(vd);
638660
}

drivers/dma/idxd/defaults.c

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Original file line numberDiff line numberDiff line change
@@ -36,12 +36,10 @@ int idxd_load_iaa_device_defaults(struct idxd_device *idxd)
3636
group->num_wqs++;
3737

3838
/* set name to "iaa_crypto" */
39-
memset(wq->name, 0, WQ_NAME_SIZE + 1);
40-
strscpy(wq->name, "iaa_crypto", WQ_NAME_SIZE + 1);
39+
strscpy_pad(wq->name, "iaa_crypto");
4140

4241
/* set driver_name to "crypto" */
43-
memset(wq->driver_name, 0, DRIVER_NAME_SIZE + 1);
44-
strscpy(wq->driver_name, "crypto", DRIVER_NAME_SIZE + 1);
42+
strscpy_pad(wq->driver_name, "crypto");
4543

4644
engine = idxd->engines[0];
4745

drivers/dma/idxd/init.c

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Original file line numberDiff line numberDiff line change
@@ -80,6 +80,8 @@ static struct pci_device_id idxd_pci_tbl[] = {
8080
{ PCI_DEVICE_DATA(INTEL, IAA_DMR, &idxd_driver_data[IDXD_TYPE_IAX]) },
8181
/* IAA PTL platforms */
8282
{ PCI_DEVICE_DATA(INTEL, IAA_PTL, &idxd_driver_data[IDXD_TYPE_IAX]) },
83+
/* IAA WCL platforms */
84+
{ PCI_DEVICE_DATA(INTEL, IAA_WCL, &idxd_driver_data[IDXD_TYPE_IAX]) },
8385
{ 0, }
8486
};
8587
MODULE_DEVICE_TABLE(pci, idxd_pci_tbl);

drivers/dma/idxd/registers.h

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Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
#define PCI_DEVICE_ID_INTEL_DSA_DMR 0x1212
1515
#define PCI_DEVICE_ID_INTEL_IAA_DMR 0x1216
1616
#define PCI_DEVICE_ID_INTEL_IAA_PTL 0xb02d
17+
#define PCI_DEVICE_ID_INTEL_IAA_WCL 0xfd2d
1718

1819
#define DEVICE_VERSION_1 0x100
1920
#define DEVICE_VERSION_2 0x200

drivers/dma/imx-sdma.c

Lines changed: 1 addition & 1 deletion
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@@ -256,7 +256,7 @@ struct sdma_script_start_addrs {
256256
/* End of v3 array */
257257
union { s32 v3_end; s32 mcu_2_zqspi_addr; };
258258
/* End of v4 array */
259-
s32 v4_end[0];
259+
s32 v4_end[];
260260
};
261261

262262
/*

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