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pmdomain: rockchip: Add support for RK3562 SoC
This driver is modified to support RK3562 SoC. Add support to ungate clk. Add support to shut down memory for RK3562. Signed-off-by: Finley Xiao <[email protected]> Signed-off-by: Kever Yang <[email protected]> Reviewed-by: Heiko Stuebner <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Ulf Hansson <[email protected]>
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drivers/pmdomain/rockchip/pm-domains.c

Lines changed: 47 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -2,7 +2,7 @@
22
/*
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* Rockchip Generic power domain support.
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*
5-
* Copyright (c) 2015 ROCKCHIP, Co. Ltd.
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* Copyright (c) 2015 Rockchip Electronics Co., Ltd.
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*/
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#include <linux/arm-smccc.h>
@@ -35,6 +35,7 @@
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#include <dt-bindings/power/rk3366-power.h>
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#include <dt-bindings/power/rk3368-power.h>
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#include <dt-bindings/power/rk3399-power.h>
38+
#include <dt-bindings/power/rockchip,rk3562-power.h>
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#include <dt-bindings/power/rk3568-power.h>
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#include <dt-bindings/power/rockchip,rk3576-power.h>
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#include <dt-bindings/power/rk3588-power.h>
@@ -135,6 +136,20 @@ struct rockchip_pmu {
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.active_wakeup = wakeup, \
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}
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#define DOMAIN_M_G_SD(_name, pwr, status, req, idle, ack, g_mask, mem, wakeup, keepon) \
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{ \
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.name = _name, \
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.pwr_w_mask = (pwr) << 16, \
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.pwr_mask = (pwr), \
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.status_mask = (status), \
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.req_w_mask = (req) << 16, \
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.req_mask = (req), \
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.idle_mask = (idle), \
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.ack_mask = (ack), \
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.clk_ungate_mask = (g_mask), \
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.active_wakeup = wakeup, \
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}
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#define DOMAIN_M_O_R(_name, p_offset, pwr, status, m_offset, m_status, r_status, r_offset, req, idle, ack, wakeup, regulator) \
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{ \
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.name = _name, \
@@ -201,6 +216,9 @@ struct rockchip_pmu {
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#define DOMAIN_RK3399(name, pwr, status, req, wakeup) \
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DOMAIN(name, pwr, status, req, req, req, wakeup)
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219+
#define DOMAIN_RK3562(name, pwr, req, g_mask, mem, wakeup) \
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DOMAIN_M_G_SD(name, pwr, pwr, req, req, req, g_mask, mem, wakeup, false)
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#define DOMAIN_RK3568(name, pwr, req, wakeup) \
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DOMAIN_M(name, pwr, pwr, req, req, req, wakeup)
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@@ -1197,6 +1215,18 @@ static const struct rockchip_domain_info rk3399_pm_domains[] = {
11971215
[RK3399_PD_SDIOAUDIO] = DOMAIN_RK3399("sdioaudio", BIT(31), BIT(31), BIT(29), true),
11981216
};
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static const struct rockchip_domain_info rk3562_pm_domains[] = {
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/* name pwr req g_mask mem wakeup */
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[RK3562_PD_GPU] = DOMAIN_RK3562("gpu", BIT(0), BIT(1), BIT(1), 0, false),
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[RK3562_PD_NPU] = DOMAIN_RK3562("npu", BIT(1), BIT(2), BIT(2), 0, false),
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[RK3562_PD_VDPU] = DOMAIN_RK3562("vdpu", BIT(2), BIT(6), BIT(6), 0, false),
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[RK3562_PD_VEPU] = DOMAIN_RK3562("vepu", BIT(3), BIT(7), BIT(7) | BIT(3), 0, false),
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[RK3562_PD_RGA] = DOMAIN_RK3562("rga", BIT(4), BIT(5), BIT(5) | BIT(4), 0, false),
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[RK3562_PD_VI] = DOMAIN_RK3562("vi", BIT(5), BIT(3), BIT(3), 0, false),
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[RK3562_PD_VO] = DOMAIN_RK3562("vo", BIT(6), BIT(4), BIT(4), 16, false),
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[RK3562_PD_PHP] = DOMAIN_RK3562("php", BIT(7), BIT(8), BIT(8), 0, false),
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};
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12001230
static const struct rockchip_domain_info rk3568_pm_domains[] = {
12011231
[RK3568_PD_NPU] = DOMAIN_RK3568("npu", BIT(1), BIT(2), false),
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[RK3568_PD_GPU] = DOMAIN_RK3568("gpu", BIT(0), BIT(1), false),
@@ -1398,6 +1428,18 @@ static const struct rockchip_pmu_info rk3399_pmu = {
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.domain_info = rk3399_pm_domains,
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};
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1431+
static const struct rockchip_pmu_info rk3562_pmu = {
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.pwr_offset = 0x210,
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.status_offset = 0x230,
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.req_offset = 0x110,
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.idle_offset = 0x128,
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.ack_offset = 0x120,
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.clk_ungate_offset = 0x140,
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1439+
.num_domains = ARRAY_SIZE(rk3562_pm_domains),
1440+
.domain_info = rk3562_pm_domains,
1441+
};
1442+
14011443
static const struct rockchip_pmu_info rk3568_pmu = {
14021444
.pwr_offset = 0xa0,
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.status_offset = 0x98,
@@ -1496,6 +1538,10 @@ static const struct of_device_id rockchip_pm_domain_dt_match[] = {
14961538
.compatible = "rockchip,rk3399-power-controller",
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.data = (void *)&rk3399_pmu,
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},
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{
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.compatible = "rockchip,rk3562-power-controller",
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.data = (void *)&rk3562_pmu,
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},
14991545
{
15001546
.compatible = "rockchip,rk3568-power-controller",
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.data = (void *)&rk3568_pmu,

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