@@ -168,7 +168,7 @@ static u32 get_st_table_loc(struct pci_dev *pdev)
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* Return the size of ST table. If ST table is not in TPH Requester Extended
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* Capability space, return 0. Otherwise return the ST Table Size + 1.
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*/
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- static u16 get_st_table_size (struct pci_dev * pdev )
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+ u16 pcie_tph_get_st_table_size (struct pci_dev * pdev )
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{
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u32 reg ;
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u32 loc ;
@@ -185,6 +185,7 @@ static u16 get_st_table_size(struct pci_dev *pdev)
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return FIELD_GET (PCI_TPH_CAP_ST_MASK , reg ) + 1 ;
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}
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+ EXPORT_SYMBOL (pcie_tph_get_st_table_size );
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/* Return device's Root Port completer capability */
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static u8 get_rp_completer_type (struct pci_dev * pdev )
@@ -211,7 +212,7 @@ static int write_tag_to_st_table(struct pci_dev *pdev, int index, u16 tag)
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int offset ;
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/* Check if index is out of bound */
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- st_table_size = get_st_table_size (pdev );
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+ st_table_size = pcie_tph_get_st_table_size (pdev );
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if (index >= st_table_size )
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return - ENXIO ;
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@@ -443,7 +444,7 @@ void pci_restore_tph_state(struct pci_dev *pdev)
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pci_write_config_dword (pdev , pdev -> tph_cap + PCI_TPH_CTRL , * cap ++ );
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st_entry = (u16 * )cap ;
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offset = PCI_TPH_BASE_SIZEOF ;
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- num_entries = get_st_table_size (pdev );
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+ num_entries = pcie_tph_get_st_table_size (pdev );
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for (i = 0 ; i < num_entries ; i ++ ) {
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pci_write_config_word (pdev , pdev -> tph_cap + offset ,
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* st_entry ++ );
@@ -475,7 +476,7 @@ void pci_save_tph_state(struct pci_dev *pdev)
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/* Save all ST entries in extended capability structure */
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st_entry = (u16 * )cap ;
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offset = PCI_TPH_BASE_SIZEOF ;
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- num_entries = get_st_table_size (pdev );
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+ num_entries = pcie_tph_get_st_table_size (pdev );
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for (i = 0 ; i < num_entries ; i ++ ) {
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pci_read_config_word (pdev , pdev -> tph_cap + offset ,
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st_entry ++ );
@@ -499,7 +500,7 @@ void pci_tph_init(struct pci_dev *pdev)
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if (!pdev -> tph_cap )
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return ;
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- num_entries = get_st_table_size (pdev );
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+ num_entries = pcie_tph_get_st_table_size (pdev );
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save_size = sizeof (u32 ) + num_entries * sizeof (u16 );
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pci_add_ext_cap_save_buffer (pdev , PCI_EXT_CAP_ID_TPH , save_size );
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}
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