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Thomas Zimmermann
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drm/ast: Gen7: Disable VGASR0[1] as on Gen4+
Set VGACRB6[5], which disables asynchronous sequencer resets via VGASR0[1]. This was most likely an oversight when adding support for Gen7. Aligns Gen7 with the earlier Gen4+. Signed-off-by: Thomas Zimmermann <[email protected]> Reviewed-by: Jocelyn Falempe <[email protected]> Link: https://lore.kernel.org/r/[email protected]
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drivers/gpu/drm/ast/ast_2600.c

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@@ -60,6 +60,7 @@ void ast_2600_set_def_ext_reg(struct ast_device *ast)
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/* Enable RAMDAC for A1 */
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reg = 0x04;
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reg |= 0x20;
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ast_set_index_reg_mask(ast, AST_IO_VGACRI, 0xb6, 0xff, reg);
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}
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