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+ # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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+ %YAML 1.2
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+ ---
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+ $id : http://devicetree.org/schemas/gpio/cdns,gpio.yaml#
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+ $schema : http://devicetree.org/meta-schemas/core.yaml#
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+
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+ title : Cadence GPIO Controller
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+
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+ maintainers :
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+
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+
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+ properties :
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+ compatible :
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+ const : cdns,gpio-r1p02
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+
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+ reg :
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+ maxItems : 1
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+
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+ clocks :
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+ maxItems : 1
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+
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+ ngpios :
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+ minimum : 1
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+ maximum : 32
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+
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+ gpio-controller : true
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+
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+ " #gpio-cells " :
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+ const : 2
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+ description : |
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+ - First cell is the GPIO line number.
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+ - Second cell is flags as defined in <dt-bindings/gpio/gpio.h>,
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+ only GPIO_ACTIVE_HIGH and GPIO_ACTIVE_LOW supported.
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+
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+ interrupt-controller : true
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+
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+ " #interrupt-cells " :
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+ const : 2
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+ description : |
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+ - First cell is the GPIO line number used as IRQ.
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+ - Second cell is the trigger type, as defined in
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+ <dt-bindings/interrupt-controller/irq.h>.
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+
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+ interrupts :
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+ maxItems : 1
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+
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+ required :
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+ - compatible
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+ - reg
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+ - clocks
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+ - gpio-controller
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+ - " #gpio-cells"
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+
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+ if :
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+ required : [interrupt-controller]
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+ then :
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+ required :
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+ - interrupts
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+
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+ additionalProperties : false
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+
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+ examples :
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+ - |
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+ #include <dt-bindings/interrupt-controller/arm-gic.h>
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+ #include <dt-bindings/interrupt-controller/irq.h>
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+ gpio0: gpio-controller@fd060000 {
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+ compatible = "cdns,gpio-r1p02";
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+ reg = <0xfd060000 0x1000>;
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+ clocks = <&gpio_clk>;
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+
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+
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+ interrupt-controller;
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+ #interrupt-cells = <2>;
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+ };
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