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Jianbo Liurleon
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net/mlx5: Add IFC bits to support RSS for IPSec offload
This adds the capabilities, ipsec_next_header and inner/outer l4_type_ext fields to support RSS for the decrypted packets. These fields are specifically for firmware steering. HWS validation logic is updated to correctly handle the changes, ensuring the unsupported fields are not set. Besides, reserved_at_c4 is fixed to reserved_at_d4 to reflect the accurate offset within the structure. Signed-off-by: Jianbo Liu <[email protected]> Reviewed-by: Carolina Jubran <[email protected]> Reviewed-by: Dragos Tatulea <[email protected]> Signed-off-by: Tariq Toukan <[email protected]> Link: https://patch.msgid.link/[email protected] Signed-off-by: Leon Romanovsky <[email protected]>
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drivers/net/ethernet/mellanox/mlx5/core/steering/hws/definer.c

Lines changed: 8 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -727,8 +727,9 @@ hws_definer_conv_outer(struct mlx5hws_definer_conv_data *cd,
727727
u32 *s_ipv6, *d_ipv6;
728728

729729
if (HWS_IS_FLD_SET_SZ(match_param, outer_headers.l4_type, 0x2) ||
730-
HWS_IS_FLD_SET_SZ(match_param, outer_headers.reserved_at_c2, 0xe) ||
731-
HWS_IS_FLD_SET_SZ(match_param, outer_headers.reserved_at_c4, 0x4)) {
730+
HWS_IS_FLD_SET_SZ(match_param, outer_headers.l4_type_ext, 0x4) ||
731+
HWS_IS_FLD_SET_SZ(match_param, outer_headers.reserved_at_c6, 0xa) ||
732+
HWS_IS_FLD_SET_SZ(match_param, outer_headers.reserved_at_d4, 0x4)) {
732733
mlx5hws_err(cd->ctx, "Unsupported outer parameters set\n");
733734
return -EINVAL;
734735
}
@@ -903,8 +904,9 @@ hws_definer_conv_inner(struct mlx5hws_definer_conv_data *cd,
903904
u32 *s_ipv6, *d_ipv6;
904905

905906
if (HWS_IS_FLD_SET_SZ(match_param, inner_headers.l4_type, 0x2) ||
906-
HWS_IS_FLD_SET_SZ(match_param, inner_headers.reserved_at_c2, 0xe) ||
907-
HWS_IS_FLD_SET_SZ(match_param, inner_headers.reserved_at_c4, 0x4)) {
907+
HWS_IS_FLD_SET_SZ(match_param, inner_headers.l4_type_ext, 0x4) ||
908+
HWS_IS_FLD_SET_SZ(match_param, inner_headers.reserved_at_c6, 0xa) ||
909+
HWS_IS_FLD_SET_SZ(match_param, inner_headers.reserved_at_d4, 0x4)) {
908910
mlx5hws_err(cd->ctx, "Unsupported inner parameters set\n");
909911
return -EINVAL;
910912
}
@@ -1279,7 +1281,8 @@ hws_definer_conv_misc2(struct mlx5hws_definer_conv_data *cd,
12791281
struct mlx5hws_definer_fc *curr_fc;
12801282

12811283
if (HWS_IS_FLD_SET_SZ(match_param, misc_parameters_2.reserved_at_1a0, 0x8) ||
1282-
HWS_IS_FLD_SET_SZ(match_param, misc_parameters_2.reserved_at_1b8, 0x8) ||
1284+
HWS_IS_FLD_SET_SZ(match_param,
1285+
misc_parameters_2.ipsec_next_header, 0x8) ||
12831286
HWS_IS_FLD_SET_SZ(match_param, misc_parameters_2.reserved_at_1c0, 0x40) ||
12841287
HWS_IS_FLD_SET(match_param, misc_parameters_2.macsec_syndrome) ||
12851288
HWS_IS_FLD_SET(match_param, misc_parameters_2.ipsec_syndrome)) {

include/linux/mlx5/mlx5_ifc.h

Lines changed: 18 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -420,7 +420,8 @@ struct mlx5_ifc_flow_table_fields_supported_bits {
420420

421421
/* Table 2170 - Flow Table Fields Supported 2 Format */
422422
struct mlx5_ifc_flow_table_fields_supported_2_bits {
423-
u8 reserved_at_0[0x2];
423+
u8 inner_l4_type_ext[0x1];
424+
u8 outer_l4_type_ext[0x1];
424425
u8 inner_l4_type[0x1];
425426
u8 outer_l4_type[0x1];
426427
u8 reserved_at_4[0xa];
@@ -429,7 +430,11 @@ struct mlx5_ifc_flow_table_fields_supported_2_bits {
429430
u8 tunnel_header_0_1[0x1];
430431
u8 reserved_at_11[0xf];
431432

432-
u8 reserved_at_20[0x60];
433+
u8 reserved_at_20[0xf];
434+
u8 ipsec_next_header[0x1];
435+
u8 reserved_at_30[0x10];
436+
437+
u8 reserved_at_40[0x40];
433438
};
434439

435440
struct mlx5_ifc_flow_table_prop_layout_bits {
@@ -552,6 +557,13 @@ enum {
552557
MLX5_PACKET_L4_TYPE_UDP,
553558
};
554559

560+
enum {
561+
MLX5_PACKET_L4_TYPE_EXT_NONE,
562+
MLX5_PACKET_L4_TYPE_EXT_TCP,
563+
MLX5_PACKET_L4_TYPE_EXT_UDP,
564+
MLX5_PACKET_L4_TYPE_EXT_ICMP,
565+
};
566+
555567
struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
556568
u8 smac_47_16[0x20];
557569

@@ -578,10 +590,10 @@ struct mlx5_ifc_fte_match_set_lyr_2_4_bits {
578590
u8 tcp_dport[0x10];
579591

580592
u8 l4_type[0x2];
581-
u8 reserved_at_c2[0xe];
593+
u8 l4_type_ext[0x4];
594+
u8 reserved_at_c6[0xa];
582595
u8 ipv4_ihl[0x4];
583-
u8 reserved_at_c4[0x4];
584-
596+
u8 reserved_at_d4[0x4];
585597
u8 ttl_hoplimit[0x8];
586598

587599
u8 udp_sport[0x10];
@@ -689,10 +701,9 @@ struct mlx5_ifc_fte_match_set_misc2_bits {
689701
u8 metadata_reg_a[0x20];
690702

691703
u8 reserved_at_1a0[0x8];
692-
693704
u8 macsec_syndrome[0x8];
694705
u8 ipsec_syndrome[0x8];
695-
u8 reserved_at_1b8[0x8];
706+
u8 ipsec_next_header[0x8];
696707

697708
u8 reserved_at_1c0[0x40];
698709
};

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