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Merge branch 'for-v6.17/clk-dt-bindings-headers' into next/clk
2 parents 320e7ef + da5cb65 commit 5324ed6

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-6
lines changed

2 files changed

+40
-6
lines changed

Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml

Lines changed: 31 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -32,23 +32,24 @@ description: |
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properties:
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compatible:
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enum:
35-
- samsung,exynosautov920-cmu-top
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- samsung,exynosautov920-cmu-cpucl0
3736
- samsung,exynosautov920-cmu-cpucl1
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- samsung,exynosautov920-cmu-cpucl2
39-
- samsung,exynosautov920-cmu-peric0
40-
- samsung,exynosautov920-cmu-peric1
41-
- samsung,exynosautov920-cmu-misc
4238
- samsung,exynosautov920-cmu-hsi0
4339
- samsung,exynosautov920-cmu-hsi1
40+
- samsung,exynosautov920-cmu-hsi2
41+
- samsung,exynosautov920-cmu-misc
42+
- samsung,exynosautov920-cmu-peric0
43+
- samsung,exynosautov920-cmu-peric1
44+
- samsung,exynosautov920-cmu-top
4445

4546
clocks:
4647
minItems: 1
47-
maxItems: 4
48+
maxItems: 5
4849

4950
clock-names:
5051
minItems: 1
51-
maxItems: 4
52+
maxItems: 5
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5354
"#clock-cells":
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const: 1
@@ -201,6 +202,30 @@ allOf:
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- const: usbdrd
202203
- const: mmc_card
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205+
- if:
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properties:
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compatible:
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contains:
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const: samsung,exynosautov920-cmu-hsi2
210+
211+
then:
212+
properties:
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clocks:
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items:
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- description: External reference clock (38.4 MHz)
216+
- description: CMU_HSI2 NOC clock (from CMU_TOP)
217+
- description: CMU_HSI2 NOC UFS clock (from CMU_TOP)
218+
- description: CMU_HSI2 UFS EMBD clock (from CMU_TOP)
219+
- description: CMU_HSI2 ETHERNET clock (from CMU_TOP)
220+
221+
clock-names:
222+
items:
223+
- const: oscclk
224+
- const: noc
225+
- const: ufs
226+
- const: embd
227+
- const: ethernet
228+
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required:
205230
- compatible
206231
- "#clock-cells"

include/dt-bindings/clock/samsung,exynosautov920.h

Lines changed: 9 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -286,4 +286,13 @@
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#define CLK_MOUT_HSI1_USBDRD_USER 3
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#define CLK_MOUT_HSI1_USBDRD 4
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289+
/* CMU_HSI2 */
290+
#define FOUT_PLL_ETH 1
291+
#define CLK_MOUT_HSI2_NOC_UFS_USER 2
292+
#define CLK_MOUT_HSI2_UFS_EMBD_USER 3
293+
#define CLK_MOUT_HSI2_ETHERNET 4
294+
#define CLK_MOUT_HSI2_ETHERNET_USER 5
295+
#define CLK_DOUT_HSI2_ETHERNET 6
296+
#define CLK_DOUT_HSI2_ETHERNET_PTP 7
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#endif /* _DT_BINDINGS_CLOCK_EXYNOSAUTOV920_H */

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