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Darshan R.hdeller
Darshan R.
authored and
hdeller
committed
fbdev: svgalib: Clean up coding style
This patch addresses various coding style issues in `svgalib.c` to improve readability and better align the code with the Linux kernel's formatting standards. The changes primarily consist of: - Adjusting whitespace around operators and after keywords. - Standardizing brace placement for control flow statements. - Removing unnecessary braces on single-statement if/else blocks. - Deleting extraneous blank lines throughout the file. These changes are purely stylistic and introduce no functional modifications. Signed-off-by: Darshan R. <[email protected]> Signed-off-by: Helge Deller <[email protected]>
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‎drivers/video/fbdev/core/svgalib.c

Lines changed: 42 additions & 53 deletions
Original file line numberDiff line numberDiff line change
@@ -19,7 +19,6 @@
1919
#include <asm/types.h>
2020
#include <asm/io.h>
2121

22-
2322
/* Write a CRT register value spread across multiple registers */
2423
void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32 value)
2524
{
@@ -31,12 +30,13 @@ void svga_wcrt_multi(void __iomem *regbase, const struct vga_regset *regset, u32
3130
while (bitnum <= regset->highbit) {
3231
bitval = 1 << bitnum;
3332
regval = regval & ~bitval;
34-
if (value & 1) regval = regval | bitval;
35-
bitnum ++;
33+
if (value & 1)
34+
regval = regval | bitval;
35+
bitnum++;
3636
value = value >> 1;
3737
}
3838
vga_wcrt(regbase, regset->regnum, regval);
39-
regset ++;
39+
regset++;
4040
}
4141
}
4242

@@ -51,12 +51,13 @@ void svga_wseq_multi(void __iomem *regbase, const struct vga_regset *regset, u32
5151
while (bitnum <= regset->highbit) {
5252
bitval = 1 << bitnum;
5353
regval = regval & ~bitval;
54-
if (value & 1) regval = regval | bitval;
55-
bitnum ++;
54+
if (value & 1)
55+
regval = regval | bitval;
56+
bitnum++;
5657
value = value >> 1;
5758
}
5859
vga_wseq(regbase, regset->regnum, regval);
59-
regset ++;
60+
regset++;
6061
}
6162
}
6263

@@ -66,15 +67,13 @@ static unsigned int svga_regset_size(const struct vga_regset *regset)
6667

6768
while (regset->regnum != VGA_REGSET_END_VAL) {
6869
count += regset->highbit - regset->lowbit + 1;
69-
regset ++;
70+
regset++;
7071
}
7172
return 1 << count;
7273
}
7374

74-
7575
/* ------------------------------------------------------------------------- */
7676

77-
7877
/* Set graphics controller registers to sane values */
7978
void svga_set_default_gfx_regs(void __iomem *regbase)
8079
{
@@ -102,7 +101,7 @@ void svga_set_default_atc_regs(void __iomem *regbase)
102101
vga_w(regbase, VGA_ATT_W, 0x00);
103102

104103
/* All standard ATC registers (AR00 - AR14) */
105-
for (count = 0; count <= 0xF; count ++)
104+
for (count = 0; count <= 0xF; count++)
106105
svga_wattr(regbase, count, count);
107106

108107
svga_wattr(regbase, VGA_ATC_MODE, 0x01);
@@ -187,10 +186,8 @@ void svga_dump_var(struct fb_var_screeninfo *var, int node)
187186
}
188187
#endif /* 0 */
189188

190-
191189
/* ------------------------------------------------------------------------- */
192190

193-
194191
void svga_settile(struct fb_info *info, struct fb_tilemap *map)
195192
{
196193
const u8 *font = map->data;
@@ -229,15 +226,15 @@ void svga_tilecopy(struct fb_info *info, struct fb_tilearea *area)
229226
((area->sy == area->dy) && (area->sx > area->dx))) {
230227
src = fb + area->sx * colstride + area->sy * rowstride;
231228
dst = fb + area->dx * colstride + area->dy * rowstride;
232-
} else {
229+
} else {
233230
src = fb + (area->sx + area->width - 1) * colstride
234231
+ (area->sy + area->height - 1) * rowstride;
235232
dst = fb + (area->dx + area->width - 1) * colstride
236233
+ (area->dy + area->height - 1) * rowstride;
237234

238235
colstride = -colstride;
239236
rowstride = -rowstride;
240-
}
237+
}
241238

242239
for (dy = 0; dy < area->height; dy++) {
243240
u16 __iomem *src2 = src;
@@ -284,19 +281,19 @@ void svga_tileblit(struct fb_info *info, struct fb_tileblit *blit)
284281
u8 __iomem *fb = (u8 __iomem *)info->screen_base;
285282
fb += blit->sx * colstride + blit->sy * rowstride;
286283

287-
i=0;
288-
for (dy=0; dy < blit->height; dy ++) {
284+
i = 0;
285+
for (dy = 0; dy < blit->height; dy++) {
289286
u8 __iomem *fb2 = fb;
290-
for (dx = 0; dx < blit->width; dx ++) {
287+
for (dx = 0; dx < blit->width; dx++) {
291288
fb_writeb(blit->indices[i], fb2);
292289
fb_writeb(attr, fb2 + 1);
293290
fb2 += colstride;
294-
i ++;
295-
if (i == blit->length) return;
291+
i++;
292+
if (i == blit->length)
293+
return;
296294
}
297295
fb += rowstride;
298296
}
299-
300297
}
301298

302299
/* Set cursor in text (tileblit) mode */
@@ -308,15 +305,15 @@ void svga_tilecursor(void __iomem *regbase, struct fb_info *info, struct fb_tile
308305
+ (cursor->sy + (info->var.yoffset / 16))
309306
* (info->var.xres_virtual / 8);
310307

311-
if (! cursor -> mode)
308+
if (!cursor->mode)
312309
return;
313310

314311
svga_wcrt_mask(regbase, 0x0A, 0x20, 0x20); /* disable cursor */
315312

316-
if (cursor -> shape == FB_TILE_CURSOR_NONE)
313+
if (cursor->shape == FB_TILE_CURSOR_NONE)
317314
return;
318315

319-
switch (cursor -> shape) {
316+
switch (cursor->shape) {
320317
case FB_TILE_CURSOR_UNDERLINE:
321318
cs = 0x0d;
322319
break;
@@ -374,7 +371,6 @@ EXPORT_SYMBOL(svga_get_caps);
374371

375372
/* ------------------------------------------------------------------------- */
376373

377-
378374
/*
379375
* Compute PLL settings (M, N, R)
380376
* F_VCO = (F_BASE * M) / N
@@ -385,7 +381,7 @@ int svga_compute_pll(const struct svga_pll *pll, u32 f_wanted, u16 *m, u16 *n, u
385381
u16 am, an, ar;
386382
u32 f_vco, f_current, delta_current, delta_best;
387383

388-
pr_debug("fb%d: ideal frequency: %d kHz\n", node, (unsigned int) f_wanted);
384+
pr_debug("fb%d: ideal frequency: %d kHz\n", node, (unsigned int)f_wanted);
389385

390386
ar = pll->r_max;
391387
f_vco = f_wanted << ar;
@@ -416,66 +412,63 @@ int svga_compute_pll(const struct svga_pll *pll, u32 f_wanted, u16 *m, u16 *n, u
416412

417413
while ((am <= pll->m_max) && (an <= pll->n_max)) {
418414
f_current = (pll->f_base * am) / an;
419-
delta_current = abs_diff (f_current, f_vco);
415+
delta_current = abs_diff(f_current, f_vco);
420416

421417
if (delta_current < delta_best) {
422418
delta_best = delta_current;
423419
*m = am;
424420
*n = an;
425421
}
426422

427-
if (f_current <= f_vco) {
428-
am ++;
429-
} else {
430-
an ++;
431-
}
423+
if (f_current <= f_vco)
424+
am++;
425+
else
426+
an++;
432427
}
433428

434429
f_current = (pll->f_base * *m) / *n;
435-
pr_debug("fb%d: found frequency: %d kHz (VCO %d kHz)\n", node, (int) (f_current >> ar), (int) f_current);
436-
pr_debug("fb%d: m = %d n = %d r = %d\n", node, (unsigned int) *m, (unsigned int) *n, (unsigned int) *r);
430+
pr_debug("fb%d: found frequency: %d kHz (VCO %d kHz)\n", node, (int)(f_current >> ar), (int)f_current);
431+
pr_debug("fb%d: m = %d n = %d r = %d\n", node, (unsigned int)*m, (unsigned int)*n, (unsigned int)*r);
437432
return 0;
438433
}
439434

440-
441435
/* ------------------------------------------------------------------------- */
442436

443-
444437
/* Check CRT timing values */
445438
int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screeninfo *var, int node)
446439
{
447440
u32 value;
448441

449-
var->xres = (var->xres+7)&~7;
450-
var->left_margin = (var->left_margin+7)&~7;
451-
var->right_margin = (var->right_margin+7)&~7;
452-
var->hsync_len = (var->hsync_len+7)&~7;
442+
var->xres = (var->xres + 7) & ~7;
443+
var->left_margin = (var->left_margin + 7) & ~7;
444+
var->right_margin = (var->right_margin + 7) & ~7;
445+
var->hsync_len = (var->hsync_len + 7) & ~7;
453446

454447
/* Check horizontal total */
455448
value = var->xres + var->left_margin + var->right_margin + var->hsync_len;
456-
if (((value / 8) - 5) >= svga_regset_size (tm->h_total_regs))
449+
if (((value / 8) - 5) >= svga_regset_size(tm->h_total_regs))
457450
return -EINVAL;
458451

459452
/* Check horizontal display and blank start */
460453
value = var->xres;
461-
if (((value / 8) - 1) >= svga_regset_size (tm->h_display_regs))
454+
if (((value / 8) - 1) >= svga_regset_size(tm->h_display_regs))
462455
return -EINVAL;
463-
if (((value / 8) - 1) >= svga_regset_size (tm->h_blank_start_regs))
456+
if (((value / 8) - 1) >= svga_regset_size(tm->h_blank_start_regs))
464457
return -EINVAL;
465458

466459
/* Check horizontal sync start */
467460
value = var->xres + var->right_margin;
468-
if (((value / 8) - 1) >= svga_regset_size (tm->h_sync_start_regs))
461+
if (((value / 8) - 1) >= svga_regset_size(tm->h_sync_start_regs))
469462
return -EINVAL;
470463

471464
/* Check horizontal blank end (or length) */
472465
value = var->left_margin + var->right_margin + var->hsync_len;
473-
if ((value == 0) || ((value / 8) >= svga_regset_size (tm->h_blank_end_regs)))
466+
if ((value == 0) || ((value / 8) >= svga_regset_size(tm->h_blank_end_regs)))
474467
return -EINVAL;
475468

476469
/* Check horizontal sync end (or length) */
477470
value = var->hsync_len;
478-
if ((value == 0) || ((value / 8) >= svga_regset_size (tm->h_sync_end_regs)))
471+
if ((value == 0) || ((value / 8) >= svga_regset_size(tm->h_sync_end_regs)))
479472
return -EINVAL;
480473

481474
/* Check vertical total */
@@ -497,12 +490,12 @@ int svga_check_timings(const struct svga_timing_regs *tm, struct fb_var_screenin
497490

498491
/* Check vertical blank end (or length) */
499492
value = var->upper_margin + var->lower_margin + var->vsync_len;
500-
if ((value == 0) || (value >= svga_regset_size (tm->v_blank_end_regs)))
493+
if ((value == 0) || (value >= svga_regset_size(tm->v_blank_end_regs)))
501494
return -EINVAL;
502495

503496
/* Check vertical sync end (or length) */
504497
value = var->vsync_len;
505-
if ((value == 0) || (value >= svga_regset_size (tm->v_sync_end_regs)))
498+
if ((value == 0) || (value >= svga_regset_size(tm->v_sync_end_regs)))
506499
return -EINVAL;
507500

508501
return 0;
@@ -596,18 +589,15 @@ void svga_set_timings(void __iomem *regbase, const struct svga_timing_regs *tm,
596589
vga_w(regbase, VGA_MIS_W, regval);
597590
}
598591

599-
600592
/* ------------------------------------------------------------------------- */
601593

602-
603594
static inline int match_format(const struct svga_fb_format *frm,
604595
struct fb_var_screeninfo *var)
605596
{
606597
int i = 0;
607598
int stored = -EINVAL;
608599

609-
while (frm->bits_per_pixel != SVGA_FORMAT_END_VAL)
610-
{
600+
while (frm->bits_per_pixel != SVGA_FORMAT_END_VAL) {
611601
if ((var->bits_per_pixel == frm->bits_per_pixel) &&
612602
(var->red.length <= frm->red.length) &&
613603
(var->green.length <= frm->green.length) &&
@@ -647,7 +637,6 @@ int svga_match_format(const struct svga_fb_format *frm,
647637
return i;
648638
}
649639

650-
651640
EXPORT_SYMBOL(svga_wcrt_multi);
652641
EXPORT_SYMBOL(svga_wseq_multi);
653642

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