43
43
* @mru_default: default MRU size for MBIM network packets
44
44
* @sideband_wake: Devices using dedicated sideband GPIO for wakeup instead
45
45
* of inband wake support (such as sdx24)
46
+ * @no_m3: M3 not supported
46
47
*/
47
48
struct mhi_pci_dev_info {
48
49
const struct mhi_controller_config * config ;
@@ -54,6 +55,7 @@ struct mhi_pci_dev_info {
54
55
unsigned int dma_data_width ;
55
56
unsigned int mru_default ;
56
57
bool sideband_wake ;
58
+ bool no_m3 ;
57
59
};
58
60
59
61
#define MHI_CHANNEL_CONFIG_UL (ch_num , ch_name , el_count , ev_ring ) \
@@ -295,6 +297,7 @@ static const struct mhi_pci_dev_info mhi_qcom_qdu100_info = {
295
297
.bar_num = MHI_PCI_DEFAULT_BAR_NUM ,
296
298
.dma_data_width = 32 ,
297
299
.sideband_wake = false,
300
+ .no_m3 = true,
298
301
};
299
302
300
303
static const struct mhi_channel_config mhi_qcom_sa8775p_channels [] = {
@@ -490,6 +493,23 @@ static const struct mhi_channel_config mhi_foxconn_sdx55_channels[] = {
490
493
MHI_CHANNEL_CONFIG_HW_DL (101 , "IP_HW0_MBIM" , 128 , 3 ),
491
494
};
492
495
496
+ static const struct mhi_channel_config mhi_foxconn_sdx61_channels [] = {
497
+ MHI_CHANNEL_CONFIG_UL (0 , "LOOPBACK" , 32 , 0 ),
498
+ MHI_CHANNEL_CONFIG_DL (1 , "LOOPBACK" , 32 , 0 ),
499
+ MHI_CHANNEL_CONFIG_UL (4 , "DIAG" , 32 , 1 ),
500
+ MHI_CHANNEL_CONFIG_DL (5 , "DIAG" , 32 , 1 ),
501
+ MHI_CHANNEL_CONFIG_UL (12 , "MBIM" , 32 , 0 ),
502
+ MHI_CHANNEL_CONFIG_DL (13 , "MBIM" , 32 , 0 ),
503
+ MHI_CHANNEL_CONFIG_UL (32 , "DUN" , 32 , 0 ),
504
+ MHI_CHANNEL_CONFIG_DL (33 , "DUN" , 32 , 0 ),
505
+ MHI_CHANNEL_CONFIG_UL_FP (34 , "FIREHOSE" , 32 , 0 ),
506
+ MHI_CHANNEL_CONFIG_DL_FP (35 , "FIREHOSE" , 32 , 0 ),
507
+ MHI_CHANNEL_CONFIG_UL (50 , "NMEA" , 32 , 0 ),
508
+ MHI_CHANNEL_CONFIG_DL (51 , "NMEA" , 32 , 0 ),
509
+ MHI_CHANNEL_CONFIG_HW_UL (100 , "IP_HW0_MBIM" , 128 , 2 ),
510
+ MHI_CHANNEL_CONFIG_HW_DL (101 , "IP_HW0_MBIM" , 128 , 3 ),
511
+ };
512
+
493
513
static struct mhi_event_config mhi_foxconn_sdx55_events [] = {
494
514
MHI_EVENT_CONFIG_CTRL (0 , 128 ),
495
515
MHI_EVENT_CONFIG_DATA (1 , 128 ),
@@ -506,6 +526,15 @@ static const struct mhi_controller_config modem_foxconn_sdx55_config = {
506
526
.event_cfg = mhi_foxconn_sdx55_events ,
507
527
};
508
528
529
+ static const struct mhi_controller_config modem_foxconn_sdx61_config = {
530
+ .max_channels = 128 ,
531
+ .timeout_ms = 20000 ,
532
+ .num_channels = ARRAY_SIZE (mhi_foxconn_sdx61_channels ),
533
+ .ch_cfg = mhi_foxconn_sdx61_channels ,
534
+ .num_events = ARRAY_SIZE (mhi_foxconn_sdx55_events ),
535
+ .event_cfg = mhi_foxconn_sdx55_events ,
536
+ };
537
+
509
538
static const struct mhi_controller_config modem_foxconn_sdx72_config = {
510
539
.max_channels = 128 ,
511
540
.timeout_ms = 20000 ,
@@ -593,8 +622,8 @@ static const struct mhi_pci_dev_info mhi_foxconn_dw5932e_info = {
593
622
.sideband_wake = false,
594
623
};
595
624
596
- static const struct mhi_pci_dev_info mhi_foxconn_t99w515_info = {
597
- .name = "foxconn-t99w515 " ,
625
+ static const struct mhi_pci_dev_info mhi_foxconn_t99w640_info = {
626
+ .name = "foxconn-t99w640 " ,
598
627
.edl = "qcom/sdx72m/foxconn/edl.mbn" ,
599
628
.edl_trigger = true,
600
629
.config = & modem_foxconn_sdx72_config ,
@@ -615,6 +644,17 @@ static const struct mhi_pci_dev_info mhi_foxconn_dw5934e_info = {
615
644
.sideband_wake = false,
616
645
};
617
646
647
+ static const struct mhi_pci_dev_info mhi_foxconn_t99w696_info = {
648
+ .name = "foxconn-t99w696" ,
649
+ .edl = "qcom/sdx61/foxconn/prog_firehose_lite.elf" ,
650
+ .edl_trigger = true,
651
+ .config = & modem_foxconn_sdx61_config ,
652
+ .bar_num = MHI_PCI_DEFAULT_BAR_NUM ,
653
+ .dma_data_width = 32 ,
654
+ .mru_default = 32768 ,
655
+ .sideband_wake = false,
656
+ };
657
+
618
658
static const struct mhi_channel_config mhi_mv3x_channels [] = {
619
659
MHI_CHANNEL_CONFIG_UL (0 , "LOOPBACK" , 64 , 0 ),
620
660
MHI_CHANNEL_CONFIG_DL (1 , "LOOPBACK" , 64 , 0 ),
@@ -695,6 +735,7 @@ static const struct mhi_pci_dev_info mhi_sierra_em919x_info = {
695
735
.config = & modem_sierra_em919x_config ,
696
736
.bar_num = MHI_PCI_DEFAULT_BAR_NUM ,
697
737
.dma_data_width = 32 ,
738
+ .mru_default = 32768 ,
698
739
.sideband_wake = false,
699
740
};
700
741
@@ -818,6 +859,16 @@ static const struct mhi_pci_dev_info mhi_telit_fn920c04_info = {
818
859
.edl_trigger = true,
819
860
};
820
861
862
+ static const struct mhi_pci_dev_info mhi_telit_fn990b40_info = {
863
+ .name = "telit-fn990b40" ,
864
+ .config = & modem_telit_fn920c04_config ,
865
+ .bar_num = MHI_PCI_DEFAULT_BAR_NUM ,
866
+ .dma_data_width = 32 ,
867
+ .sideband_wake = false,
868
+ .mru_default = 32768 ,
869
+ .edl_trigger = true,
870
+ };
871
+
821
872
static const struct mhi_pci_dev_info mhi_netprisma_lcur57_info = {
822
873
.name = "netprisma-lcur57" ,
823
874
.edl = "qcom/prog_firehose_sdx24.mbn" ,
@@ -852,6 +903,9 @@ static const struct pci_device_id mhi_pci_id_table[] = {
852
903
/* EM919x (sdx55), use the same vid:pid as qcom-sdx55m */
853
904
{ PCI_DEVICE_SUB (PCI_VENDOR_ID_QCOM , 0x0306 , 0x18d7 , 0x0200 ),
854
905
.driver_data = (kernel_ulong_t ) & mhi_sierra_em919x_info },
906
+ /* EM929x (sdx65), use the same configuration as EM919x */
907
+ { PCI_DEVICE_SUB (PCI_VENDOR_ID_QCOM , 0x0308 , 0x18d7 , 0x0301 ),
908
+ .driver_data = (kernel_ulong_t ) & mhi_sierra_em919x_info },
855
909
/* Telit FN980 hardware revision v1 */
856
910
{ PCI_DEVICE_SUB (PCI_VENDOR_ID_QCOM , 0x0306 , 0x1C5D , 0x2000 ),
857
911
.driver_data = (kernel_ulong_t ) & mhi_telit_fn980_hw_v1_info },
@@ -863,8 +917,26 @@ static const struct pci_device_id mhi_pci_id_table[] = {
863
917
/* Telit FE990A */
864
918
{ PCI_DEVICE_SUB (PCI_VENDOR_ID_QCOM , 0x0308 , 0x1c5d , 0x2015 ),
865
919
.driver_data = (kernel_ulong_t ) & mhi_telit_fe990a_info },
920
+ /* Foxconn T99W696.01, Lenovo Generic SKU */
921
+ { PCI_DEVICE_SUB (PCI_VENDOR_ID_QCOM , 0x0308 , PCI_VENDOR_ID_FOXCONN , 0xe142 ),
922
+ .driver_data = (kernel_ulong_t ) & mhi_foxconn_t99w696_info },
923
+ /* Foxconn T99W696.02, Lenovo X1 Carbon SKU */
924
+ { PCI_DEVICE_SUB (PCI_VENDOR_ID_QCOM , 0x0308 , PCI_VENDOR_ID_FOXCONN , 0xe143 ),
925
+ .driver_data = (kernel_ulong_t ) & mhi_foxconn_t99w696_info },
926
+ /* Foxconn T99W696.03, Lenovo X1 2in1 SKU */
927
+ { PCI_DEVICE_SUB (PCI_VENDOR_ID_QCOM , 0x0308 , PCI_VENDOR_ID_FOXCONN , 0xe144 ),
928
+ .driver_data = (kernel_ulong_t ) & mhi_foxconn_t99w696_info },
929
+ /* Foxconn T99W696.04, Lenovo PRC SKU */
930
+ { PCI_DEVICE_SUB (PCI_VENDOR_ID_QCOM , 0x0308 , PCI_VENDOR_ID_FOXCONN , 0xe145 ),
931
+ .driver_data = (kernel_ulong_t ) & mhi_foxconn_t99w696_info },
932
+ /* Foxconn T99W696.00, Foxconn SKU */
933
+ { PCI_DEVICE_SUB (PCI_VENDOR_ID_QCOM , 0x0308 , PCI_VENDOR_ID_FOXCONN , 0xe146 ),
934
+ .driver_data = (kernel_ulong_t ) & mhi_foxconn_t99w696_info },
866
935
{ PCI_DEVICE (PCI_VENDOR_ID_QCOM , 0x0308 ),
867
936
.driver_data = (kernel_ulong_t ) & mhi_qcom_sdx65_info },
937
+ /* Telit FN990B40 (sdx72) */
938
+ { PCI_DEVICE_SUB (PCI_VENDOR_ID_QCOM , 0x0309 , 0x1c5d , 0x201a ),
939
+ .driver_data = (kernel_ulong_t ) & mhi_telit_fn990b40_info },
868
940
{ PCI_DEVICE (PCI_VENDOR_ID_QCOM , 0x0309 ),
869
941
.driver_data = (kernel_ulong_t ) & mhi_qcom_sdx75_info },
870
942
/* QDU100, x100-DU */
@@ -920,9 +992,9 @@ static const struct pci_device_id mhi_pci_id_table[] = {
920
992
/* DW5932e (sdx62), Non-eSIM */
921
993
{ PCI_DEVICE (PCI_VENDOR_ID_FOXCONN , 0xe0f9 ),
922
994
.driver_data = (kernel_ulong_t ) & mhi_foxconn_dw5932e_info },
923
- /* T99W515 (sdx72) */
995
+ /* T99W640 (sdx72) */
924
996
{ PCI_DEVICE (PCI_VENDOR_ID_FOXCONN , 0xe118 ),
925
- .driver_data = (kernel_ulong_t ) & mhi_foxconn_t99w515_info },
997
+ .driver_data = (kernel_ulong_t ) & mhi_foxconn_t99w640_info },
926
998
/* DW5934e(sdx72), With eSIM */
927
999
{ PCI_DEVICE (PCI_VENDOR_ID_FOXCONN , 0xe11d ),
928
1000
.driver_data = (kernel_ulong_t ) & mhi_foxconn_dw5934e_info },
@@ -1306,8 +1378,8 @@ static int mhi_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
1306
1378
/* start health check */
1307
1379
mod_timer (& mhi_pdev -> health_check_timer , jiffies + HEALTH_CHECK_PERIOD );
1308
1380
1309
- /* Only allow runtime- suspend if PME capable (for wakeup) */
1310
- if (pci_pme_capable (pdev , PCI_D3hot )) {
1381
+ /* Allow runtime suspend only if both PME from D3Hot and M3 are supported */
1382
+ if (pci_pme_capable (pdev , PCI_D3hot ) && !( info -> no_m3 ) ) {
1311
1383
pm_runtime_set_autosuspend_delay (& pdev -> dev , 2000 );
1312
1384
pm_runtime_use_autosuspend (& pdev -> dev );
1313
1385
pm_runtime_mark_last_busy (& pdev -> dev );
0 commit comments