@@ -1657,28 +1657,43 @@ early_param("tsa", tsa_parse_cmdline);
1657
1657
1658
1658
static void __init tsa_select_mitigation (void )
1659
1659
{
1660
- if (cpu_mitigations_off () || !boot_cpu_has_bug (X86_BUG_TSA )) {
1660
+ if (!boot_cpu_has_bug (X86_BUG_TSA )) {
1661
1661
tsa_mitigation = TSA_MITIGATION_NONE ;
1662
1662
return ;
1663
1663
}
1664
1664
1665
+ if (tsa_mitigation == TSA_MITIGATION_AUTO ) {
1666
+ bool vm = false, uk = false;
1667
+
1668
+ tsa_mitigation = TSA_MITIGATION_NONE ;
1669
+
1670
+ if (cpu_attack_vector_mitigated (CPU_MITIGATE_USER_KERNEL ) ||
1671
+ cpu_attack_vector_mitigated (CPU_MITIGATE_USER_USER )) {
1672
+ tsa_mitigation = TSA_MITIGATION_USER_KERNEL ;
1673
+ uk = true;
1674
+ }
1675
+
1676
+ if (cpu_attack_vector_mitigated (CPU_MITIGATE_GUEST_HOST ) ||
1677
+ cpu_attack_vector_mitigated (CPU_MITIGATE_GUEST_GUEST )) {
1678
+ tsa_mitigation = TSA_MITIGATION_VM ;
1679
+ vm = true;
1680
+ }
1681
+
1682
+ if (uk && vm )
1683
+ tsa_mitigation = TSA_MITIGATION_FULL ;
1684
+ }
1685
+
1665
1686
if (tsa_mitigation == TSA_MITIGATION_NONE )
1666
1687
return ;
1667
1688
1668
- if (!boot_cpu_has (X86_FEATURE_VERW_CLEAR )) {
1689
+ if (!boot_cpu_has (X86_FEATURE_VERW_CLEAR ))
1669
1690
tsa_mitigation = TSA_MITIGATION_UCODE_NEEDED ;
1670
- goto out ;
1671
- }
1672
-
1673
- if (tsa_mitigation == TSA_MITIGATION_AUTO )
1674
- tsa_mitigation = TSA_MITIGATION_FULL ;
1675
1691
1676
1692
/*
1677
1693
* No need to set verw_clear_cpu_buf_mitigation_selected - it
1678
1694
* doesn't fit all cases here and it is not needed because this
1679
1695
* is the only VERW-based mitigation on AMD.
1680
1696
*/
1681
- out :
1682
1697
pr_info ("%s\n" , tsa_strings [tsa_mitigation ]);
1683
1698
}
1684
1699
0 commit comments