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chintanv133r-vignesh
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arm64: dts: ti: k3-am68-sk-base-board: Add bootph-all property to enable Ethernet boot
Ethernet boot requires CPSW nodes to be present starting from R5 SPL stage. Add bootph-all property to required nodes to enable Ethernet boot on SK-AM68. Reviewed-by: Siddharth Vadapalli <[email protected]> Signed-off-by: Chintan Vankar <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Vignesh Raghavendra <[email protected]>
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arch/arm64/boot/dts/ti/k3-am68-sk-base-board.dts

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@@ -344,13 +344,15 @@
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J721S2_WKUP_IOPAD(0x018, PIN_OUTPUT, 0) /* (F21) MCU_RGMII1_TXC */
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J721S2_WKUP_IOPAD(0x000, PIN_OUTPUT, 0) /* (F22) MCU_RGMII1_TX_CTL */
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>;
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bootph-all;
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};
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mcu_mdio_pins_default: mcu-mdio-default-pins {
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pinctrl-single,pins = <
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J721S2_WKUP_IOPAD(0x034, PIN_OUTPUT, 0) /* (A21) MCU_MDIO0_MDC */
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J721S2_WKUP_IOPAD(0x030, PIN_INPUT, 0) /* (A22) MCU_MDIO0_MDIO */
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>;
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bootph-all;
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};
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mcu_mcan0_pins_default: mcu-mcan0-default-pins {
@@ -412,6 +414,14 @@
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};
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};
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&cpsw_mac_syscon {
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bootph-all;
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};
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&phy_gmii_sel {
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bootph-all;
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};
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&main_gpio0 {
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status = "okay";
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pinctrl-names = "default";
@@ -626,6 +636,7 @@
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&davinci_mdio {
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phy0: ethernet-phy@0 {
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reg = <0>;
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bootph-all;
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ti,rx-internal-delay = <DP83867_RGMIIDCTL_2_00_NS>;
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ti,fifo-depth = <DP83867_PHYCR_FIFO_DEPTH_4_B_NIB>;
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ti,min-output-impedance;
@@ -635,6 +646,7 @@
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&cpsw_port1 {
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phy-mode = "rgmii-rxid";
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phy-handle = <&phy0>;
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bootph-all;
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};
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&mcu_mcan0 {

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