@@ -117,6 +117,15 @@ enum tegra264_cbb_fabric_ids {
117
117
T264_RSVD7_FABRIC_ID ,
118
118
};
119
119
120
+ enum t254_cbb_fabric_ids {
121
+ T254_DCE_FABRIC_ID = 19 ,
122
+ T254_DISP_CLUSTER_FABRIC_ID = 25 ,
123
+ T254_C2C_FABRIC_ID = 26 ,
124
+ T254_GPU_FABRIC_ID = 27 ,
125
+ T254_DISP_CLUSTER_1_FABRIC_ID = 28 ,
126
+ T254_MAX_FABRIC_ID ,
127
+ };
128
+
120
129
struct tegra234_target_lookup {
121
130
const char * name ;
122
131
unsigned int offset ;
@@ -1418,6 +1427,52 @@ static const struct tegra234_cbb_fabric tegra264_vision_cbb_fabric = {
1418
1427
.firewall_wr_ctl = 0x5c8 ,
1419
1428
};
1420
1429
1430
+ static const struct tegra234_fabric_lookup t254_cbb_fab_list [] = {
1431
+ [T254_C2C_FABRIC_ID ] = { "c2c-fabric" , true },
1432
+ [T254_DISP_CLUSTER_FABRIC_ID ] = { "display-cluster-fabric" , true },
1433
+ [T254_GPU_FABRIC_ID ] = { "gpu-fabric" , true },
1434
+ };
1435
+
1436
+ static const struct tegra234_cbb_fabric t254_c2c_fabric = {
1437
+ .fab_id = T254_C2C_FABRIC_ID ,
1438
+ .fab_list = t254_cbb_fab_list ,
1439
+ .errors = tegra241_cbb_errors ,
1440
+ .max_errors = ARRAY_SIZE (tegra241_cbb_errors ),
1441
+ .err_intr_enbl = 0xf ,
1442
+ .err_status_clr = 0x1ff007f ,
1443
+ .notifier_offset = 0x50000 ,
1444
+ .off_mask_erd = 0x14004 ,
1445
+ .firewall_base = 0x40000 ,
1446
+ .firewall_ctl = 0x9b0 ,
1447
+ .firewall_wr_ctl = 0x9a8 ,
1448
+ };
1449
+
1450
+ static const struct tegra234_cbb_fabric t254_disp_fabric = {
1451
+ .fab_id = T254_DISP_CLUSTER_FABRIC_ID ,
1452
+ .fab_list = t254_cbb_fab_list ,
1453
+ .errors = tegra241_cbb_errors ,
1454
+ .max_errors = ARRAY_SIZE (tegra241_cbb_errors ),
1455
+ .err_intr_enbl = 0x1 ,
1456
+ .err_status_clr = 0x1ff007f ,
1457
+ .notifier_offset = 0x50000 ,
1458
+ .firewall_base = 0x30000 ,
1459
+ .firewall_ctl = 0x810 ,
1460
+ .firewall_wr_ctl = 0x808 ,
1461
+ };
1462
+
1463
+ static const struct tegra234_cbb_fabric t254_gpu_fabric = {
1464
+ .fab_id = T254_GPU_FABRIC_ID ,
1465
+ .fab_list = t254_cbb_fab_list ,
1466
+ .errors = tegra241_cbb_errors ,
1467
+ .max_errors = ARRAY_SIZE (tegra241_cbb_errors ),
1468
+ .err_intr_enbl = 0x1f ,
1469
+ .err_status_clr = 0x1ff007f ,
1470
+ .notifier_offset = 0x50000 ,
1471
+ .firewall_base = 0x30000 ,
1472
+ .firewall_ctl = 0x930 ,
1473
+ .firewall_wr_ctl = 0x928 ,
1474
+ };
1475
+
1421
1476
static const struct of_device_id tegra234_cbb_dt_ids [] = {
1422
1477
{ .compatible = "nvidia,tegra234-cbb-fabric" , .data = & tegra234_cbb_fabric },
1423
1478
{ .compatible = "nvidia,tegra234-aon-fabric" , .data = & tegra234_aon_fabric },
@@ -1442,6 +1497,9 @@ struct tegra234_cbb_acpi_uid {
1442
1497
static const struct tegra234_cbb_acpi_uid tegra234_cbb_acpi_uids [] = {
1443
1498
{ "NVDA1070" , "1" , & tegra241_cbb_fabric },
1444
1499
{ "NVDA1070" , "2" , & tegra241_bpmp_fabric },
1500
+ { "NVDA1070" , "3" , & t254_c2c_fabric },
1501
+ { "NVDA1070" , "4" , & t254_disp_fabric },
1502
+ { "NVDA1070" , "5" , & t254_gpu_fabric },
1445
1503
{ },
1446
1504
};
1447
1505
0 commit comments