Merge tag 'nand/for-6.17' into mtd/next

* Raw NAND changes:

Various controller drivers received minor fixes like DMA mapping checks,
better timing derivations or bitflip statistics.
It has also been discovered that some Hynix NAND flashes were not
supporting read-retries, which is not properly supported.

* SPI NAND changes:

In order to support high-speed modes, certain chips need extra
configuration like adding more dummy cycles. This is now possible,
especially on Winbond chips.

Aside from that, Gigadevice gets support for a new chip (GD5F1GM9).

Signed-off-by: Miquel Raynal <[email protected]>

Author: miquelraynal

.mailmap

@@ -197,6 +197,7 @@ Daniel Borkmann <[email protected]> <[email protected]>
 Daniel Borkmann <[email protected]> <[email protected]>
 Daniel Borkmann <[email protected]> <[email protected]>
 Daniel Borkmann <[email protected]> <[email protected]>
+Danilo Krummrich <[email protected]> <[email protected]>
 David Brownell <[email protected]>
 David Collins <[email protected]> <[email protected]>
 David Heidelberg <[email protected]> <[email protected]>
@@ -222,6 +223,8 @@ Dmitry Safonov <[email protected]> <[email protected]>
 Dmitry Safonov <[email protected]> <[email protected]>
 Domen Puncer <[email protected]>
 Douglas Gilbert <[email protected]>
+Drew Fustini <[email protected]> <[email protected]>
+<[email protected]> <[email protected]>
 Ed L. Cashin <[email protected]>
 Elliot Berman <[email protected]> <[email protected]>
 Enric Balletbo i Serra <[email protected]> <[email protected]>
@@ -282,6 +285,7 @@ Gustavo Padovan <[email protected]>
 Gustavo Padovan <[email protected]>
 Hamza Mahfooz <[email protected]> <[email protected]>
 Hanjun Guo <[email protected]> <[email protected]>
+Hans de Goede <[email protected]> <[email protected]>
 Hans Verkuil <[email protected]> <[email protected]>
 Hans Verkuil <[email protected]> <[email protected]>
 Harry Yoo <[email protected]> <[email protected]>
@@ -426,6 +430,9 @@ Krzysztof Wilczyński <[email protected]> <[email protected]>
 Krzysztof Wilczyński <[email protected]> <[email protected]>
 Kshitiz Godara <[email protected]> <[email protected]>
 Kuninori Morimoto <[email protected]>
+Kuniyuki Iwashima <[email protected]> <[email protected]>
+Kuniyuki Iwashima <[email protected]> <[email protected]>
+Kuniyuki Iwashima <[email protected]> <[email protected]>
 Kuogee Hsieh <[email protected]> <[email protected]>
 Lee Jones <[email protected]> <[email protected]>
 Lee Jones <[email protected]> <[email protected]>
@@ -688,9 +695,10 @@ Serge Hallyn <[email protected]> <[email protected]>
 Serge Hallyn <[email protected]> <[email protected]>
 Seth Forshee <[email protected]> <[email protected]>
 Shakeel Butt <[email protected]> <[email protected]>
-Shannon Nelson <[email protected]> <[email protected]>
-Shannon Nelson <[email protected]> <[email protected]>
-Shannon Nelson <[email protected]> <[email protected]>
+Shannon Nelson <[email protected]> <[email protected]>
+Shannon Nelson <[email protected]> <[email protected]>
+Shannon Nelson <[email protected]> <[email protected]>
+Shannon Nelson <[email protected]> <[email protected]>
 Sharath Chandra Vurukala <[email protected]> <[email protected]>
 Shiraz Hashim <[email protected]> <[email protected]>
 Shuah Khan <[email protected]> <[email protected]>
@@ -719,6 +727,7 @@ Srinivas Ramana <[email protected]> <[email protected]>
 Sriram R <[email protected]> <[email protected]>
 Sriram Yagnaraman <[email protected]> <[email protected]>
 Stanislav Fomichev <[email protected]> <[email protected]>
+Stanislav Fomichev <[email protected]> <[email protected]>
 Stefan Wahren <[email protected]> <[email protected]>
 Stéphane Witzmann <[email protected]>
 Stephen Hemminger <[email protected]> <[email protected]>
@@ -823,3 +832,6 @@ Yosry Ahmed <[email protected]> <[email protected]>
 Yusuke Goda <[email protected]>
 Zack Rusin <[email protected]> <[email protected]>
 Zhu Yanjun <[email protected]> <[email protected]>
+Zijun Hu <[email protected]> <[email protected]>
+Zijun Hu <[email protected]> <[email protected]>
+Zijun Hu <[email protected]>

CREDITS

@@ -2981,6 +2981,11 @@ S: 521 Pleasant Valley Road
 S: Potsdam, New York 13676
 S: USA
 
+N: Shannon Nelson
+E: [email protected]
+D: Worked on several network drivers including
+D: ixgbe, i40e, ionic, pds_core, pds_vdpa, pds_fwctl
+
 N: Dave Neuer
 E: [email protected]
 D: Helped implement support for Compaq's H31xx series iPAQs

Documentation/ABI/testing/sysfs-edac-scrub

@@ -49,6 +49,12 @@ Description:
 		(RO) Supported minimum scrub cycle duration in seconds
 		by the memory scrubber.
 
+		Device-based scrub: returns the minimum scrub cycle
+		supported by the memory device.
+
+		Region-based scrub: returns the max of minimum scrub cycles
+		supported by individual memory devices that back the region.
+
 What:		/sys/bus/edac/devices/<dev-name>/scrubX/max_cycle_duration
 Date:		March 2025
 KernelVersion:	6.15
@@ -57,6 +63,16 @@ Description:
 		(RO) Supported maximum scrub cycle duration in seconds
 		by the memory scrubber.
 
+		Device-based scrub: returns the maximum scrub cycle supported
+		by the memory device.
+
+		Region-based scrub: returns the min of maximum scrub cycles
+		supported by individual memory devices that back the region.
+
+		If the memory device does not provide maximum scrub cycle
+		information, return the maximum supported value of the scrub
+		cycle field.
+
 What:		/sys/bus/edac/devices/<dev-name>/scrubX/current_cycle_duration
 Date:		March 2025
 KernelVersion:	6.15

Documentation/admin-guide/cifs/usage.rst

@@ -270,6 +270,8 @@ configured for Unix Extensions (and the client has not disabled
 illegal Windows/NTFS/SMB characters to a remap range (this mount parameter
 is the default for SMB3). This remap (``mapposix``) range is also
 compatible with Mac (and "Services for Mac" on some older Windows).
+When POSIX Extensions for SMB 3.1.1 are negotiated, remapping is automatically
+disabled.
 
 CIFS VFS Mount Options
 ======================

Documentation/arch/arm64/booting.rst

@@ -234,7 +234,7 @@ Before jumping into the kernel, the following conditions must be met:
 
   - If the kernel is entered at EL1:
 
-      - ICC.SRE_EL2.Enable (bit 3) must be initialised to 0b1
+      - ICC_SRE_EL2.Enable (bit 3) must be initialised to 0b1
       - ICC_SRE_EL2.SRE (bit 0) must be initialised to 0b1.
 
   - The DT or ACPI tables must describe a GICv3 interrupt controller.

Documentation/block/ublk.rst

@@ -352,6 +352,83 @@ For reaching best IO performance, ublk server should align its segment
 parameter of `struct ublk_param_segment` with backend for avoiding
 unnecessary IO split, which usually hurts io_uring performance.
 
+Auto Buffer Registration
+------------------------
+
+The ``UBLK_F_AUTO_BUF_REG`` feature automatically handles buffer registration
+and unregistration for I/O requests, which simplifies the buffer management
+process and reduces overhead in the ublk server implementation.
+
+This is another feature flag for using zero copy, and it is compatible with
+``UBLK_F_SUPPORT_ZERO_COPY``.
+
+Feature Overview
+~~~~~~~~~~~~~~~~
+
+This feature automatically registers request buffers to the io_uring context
+before delivering I/O commands to the ublk server and unregisters them when
+completing I/O commands. This eliminates the need for manual buffer
+registration/unregistration via ``UBLK_IO_REGISTER_IO_BUF`` and
+``UBLK_IO_UNREGISTER_IO_BUF`` commands, then IO handling in ublk server
+can avoid dependency on the two uring_cmd operations.
+
+IOs can't be issued concurrently to io_uring if there is any dependency
+among these IOs. So this way not only simplifies ublk server implementation,
+but also makes concurrent IO handling becomes possible by removing the
+dependency on buffer registration & unregistration commands.
+
+Usage Requirements
+~~~~~~~~~~~~~~~~~~
+
+1. The ublk server must create a sparse buffer table on the same ``io_ring_ctx``
+   used for ``UBLK_IO_FETCH_REQ`` and ``UBLK_IO_COMMIT_AND_FETCH_REQ``. If
+   uring_cmd is issued on a different ``io_ring_ctx``, manual buffer
+   unregistration is required.
+
+2. Buffer registration data must be passed via uring_cmd's ``sqe->addr`` with the
+   following structure::
+
+    struct ublk_auto_buf_reg {
+        __u16 index;      /* Buffer index for registration */
+        __u8 flags;       /* Registration flags */
+        __u8 reserved0;   /* Reserved for future use */
+        __u32 reserved1;  /* Reserved for future use */
+    };
+
+   ublk_auto_buf_reg_to_sqe_addr() is for converting the above structure into
+   ``sqe->addr``.
+
+3. All reserved fields in ``ublk_auto_buf_reg`` must be zeroed.
+
+4. Optional flags can be passed via ``ublk_auto_buf_reg.flags``.
+
+Fallback Behavior
+~~~~~~~~~~~~~~~~~
+
+If auto buffer registration fails:
+
+1. When ``UBLK_AUTO_BUF_REG_FALLBACK`` is enabled:
+
+   - The uring_cmd is completed
+   - ``UBLK_IO_F_NEED_REG_BUF`` is set in ``ublksrv_io_desc.op_flags``
+   - The ublk server must manually deal with the failure, such as, register
+     the buffer manually, or using user copy feature for retrieving the data
+     for handling ublk IO
+
+2. If fallback is not enabled:
+
+   - The ublk I/O request fails silently
+   - The uring_cmd won't be completed
+
+Limitations
+~~~~~~~~~~~
+
+- Requires same ``io_ring_ctx`` for all operations
+- May require manual buffer management in fallback cases
+- io_ring_ctx buffer table has a max size of 16K, which may not be enough
+  in case that too many ublk devices are handled by this single io_ring_ctx
+  and each one has very large queue depth
+
 References
 ==========
 

Documentation/bpf/map_hash.rst

@@ -233,10 +233,16 @@ attempts in order to enforce the LRU property which have increasing impacts on
 other CPUs involved in the following operation attempts:
 
 - Attempt to use CPU-local state to batch operations
-- Attempt to fetch free nodes from global lists
+- Attempt to fetch ``target_free`` free nodes from global lists
 - Attempt to pull any node from a global list and remove it from the hashmap
 - Attempt to pull any node from any CPU's list and remove it from the hashmap
 
+The number of nodes to borrow from the global list in a batch, ``target_free``,
+depends on the size of the map. Larger batch size reduces lock contention, but
+may also exhaust the global structure. The value is computed at map init to
+avoid exhaustion, by limiting aggregate reservation by all CPUs to half the map
+size. With a minimum of a single element and maximum budget of 128 at a time.
+
 This algorithm is described visually in the following diagram. See the
 description in commit 3a08c2fd7634 ("bpf: LRU List") for a full explanation of
 the corresponding operations:

Documentation/bpf/map_lru_hash_update.dot

@@ -35,18 +35,18 @@ digraph {
   fn_bpf_lru_list_pop_free_to_local [shape=rectangle,fillcolor=2,
     label="Flush local pending,
     Rotate Global list, move
-    LOCAL_FREE_TARGET
+    target_free
     from global -> local"]
   // Also corresponds to:
   // fn__local_list_flush()
   // fn_bpf_lru_list_rotate()
   fn___bpf_lru_node_move_to_free[shape=diamond,fillcolor=2,
-    label="Able to free\nLOCAL_FREE_TARGET\nnodes?"]
+    label="Able to free\ntarget_free\nnodes?"]
 
   fn___bpf_lru_list_shrink_inactive [shape=rectangle,fillcolor=3,
     label="Shrink inactive list
       up to remaining
-      LOCAL_FREE_TARGET
+      target_free
       (global LRU -> local)"]
   fn___bpf_lru_list_shrink [shape=diamond,fillcolor=2,
     label="> 0 entries in\nlocal free list?"]

Documentation/devicetree/bindings/display/bridge/ti,sn65dsi83.yaml

@@ -118,15 +118,11 @@ $defs:
           ti,lvds-vod-swing-clock-microvolt:
             description: LVDS diferential output voltage <min max> for clock
               lanes in microvolts.
-            $ref: /schemas/types.yaml#/definitions/uint32-array
-            minItems: 2
             maxItems: 2
 
           ti,lvds-vod-swing-data-microvolt:
             description: LVDS diferential output voltage <min max> for data
               lanes in microvolts.
-            $ref: /schemas/types.yaml#/definitions/uint32-array
-            minItems: 2
             maxItems: 2
 
 allOf:

Documentation/devicetree/bindings/i2c/nvidia,tegra20-i2c.yaml

@@ -97,7 +97,10 @@ properties:
 
   resets:
     items:
-      - description: module reset
+      - description:
+          Module reset. This property is optional for controllers in Tegra194,
+          Tegra234 etc where an internal software reset is available as an
+          alternative.
 
   reset-names:
     items:
@@ -116,6 +119,13 @@ properties:
       - const: rx
       - const: tx
 
+required:
+  - compatible
+  - reg
+  - interrupts
+  - clocks
+  - clock-names
+
 allOf:
   - $ref: /schemas/i2c/i2c-controller.yaml
   - if:
@@ -169,6 +179,18 @@ allOf:
       properties:
         power-domains: false
 
+  - if:
+      not:
+        properties:
+          compatible:
+            contains:
+              enum:
+                - nvidia,tegra194-i2c
+    then:
+      required:
+        - resets
+        - reset-names
+
 unevaluatedProperties: false
 
 examples: