|
1430 | 1430 | status = "disabled";
|
1431 | 1431 | };
|
1432 | 1432 |
|
| 1433 | + ufshci: ufshci@11270000 { |
| 1434 | + compatible = "mediatek,mt8195-ufshci"; |
| 1435 | + reg = <0 0x11270000 0 0x2300>; |
| 1436 | + interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH 0>; |
| 1437 | + phys = <&ufsphy>; |
| 1438 | + clocks = <&infracfg_ao CLK_INFRA_AO_AES_UFSFDE>, |
| 1439 | + <&infracfg_ao CLK_INFRA_AO_AES>, |
| 1440 | + <&infracfg_ao CLK_INFRA_AO_UFS_TICK>, |
| 1441 | + <&infracfg_ao CLK_INFRA_AO_UNIPRO_SYS>, |
| 1442 | + <&infracfg_ao CLK_INFRA_AO_UNIPRO_TICK>, |
| 1443 | + <&infracfg_ao CLK_INFRA_AO_UFS_MP_SAP_B>, |
| 1444 | + <&infracfg_ao CLK_INFRA_AO_UFS_TX_SYMBOL>, |
| 1445 | + <&infracfg_ao CLK_INFRA_AO_PERI_UFS_MEM_SUB>; |
| 1446 | + clock-names = "ufs", "ufs_aes", "ufs_tick", |
| 1447 | + "unipro_sysclk", "unipro_tick", |
| 1448 | + "unipro_mp_bclk", "ufs_tx_symbol", |
| 1449 | + "ufs_mem_sub"; |
| 1450 | + freq-table-hz = <0 0>, <0 0>, <0 0>, |
| 1451 | + <0 0>, <0 0>, <0 0>, |
| 1452 | + <0 0>, <0 0>; |
| 1453 | + |
| 1454 | + mediatek,ufs-disable-mcq; |
| 1455 | + status = "disabled"; |
| 1456 | + }; |
| 1457 | + |
1433 | 1458 | lvts_mcu: thermal-sensor@11278000 {
|
1434 | 1459 | compatible = "mediatek,mt8195-lvts-mcu";
|
1435 | 1460 | reg = <0 0x11278000 0 0x1000>;
|
|
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