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Merge tag 'mailbox-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox
Pull mailbox updates from Jassi Brar: - aspeed: add driver and bindings for ast2700 - broadcom: add driver and bindings for bcm74110 - mediatek: fix RPM api usage - qcom: use dev_fwnode - pcc: support shared buffer - misc dt-bindings cleanup * tag 'mailbox-v6.17' of git://git.kernel.org/pub/scm/linux/kernel/git/jassibrar/mailbox: mailbox/pcc: support mailbox management of the shared buffer mailbox: bcm74110: Fix spelling mistake mailbox: bcm74110: remove unneeded semicolon mailbox: aspeed: add mailbox driver for AST27XX series SoC dt-bindings: mailbox: Add ASPEED AST2700 series SoC dt-bindings: mailbox: Drop consumers example DTS dt-bindings: mailbox: nvidia,tegra186-hsp: Use generic node name dt-bindings: mailbox: Correct example indentation dt-bindings: mailbox: ti,secure-proxy: Add missing reg maxItems dt-bindings: mailbox: amlogic,meson-gxbb-mhu: Add missing interrupts maxItems dt-bindings: mailbox: qcom-ipcc: document the Milos Inter-Processor Communication Controller mailbox: Add support for bcm74110 dt-bindings: mailbox: Add support for bcm74110 mailbox: Use dev_fwnode() mailbox: mtk-cmdq: Switch to pm_runtime_put_autosuspend()
2 parents 0227b49 + 5378bdf commit b20b853

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‎Documentation/devicetree/bindings/mailbox/allwinner,sun6i-a31-msgbox.yaml

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@@ -68,13 +68,13 @@ examples:
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#include <dt-bindings/reset/sun8i-h3-ccu.h>
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msgbox: mailbox@1c17000 {
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compatible = "allwinner,sun8i-h3-msgbox",
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"allwinner,sun6i-a31-msgbox";
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reg = <0x01c17000 0x1000>;
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clocks = <&ccu CLK_BUS_MSGBOX>;
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resets = <&ccu RST_BUS_MSGBOX>;
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interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <1>;
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compatible = "allwinner,sun8i-h3-msgbox",
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"allwinner,sun6i-a31-msgbox";
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reg = <0x01c17000 0x1000>;
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clocks = <&ccu CLK_BUS_MSGBOX>;
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resets = <&ccu RST_BUS_MSGBOX>;
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interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <1>;
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};
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...

‎Documentation/devicetree/bindings/mailbox/amlogic,meson-gxbb-mhu.yaml

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maxItems: 1
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interrupts:
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minItems: 3
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maxItems: 3
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description:
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Contains the interrupt information corresponding to each of the 3 links
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of MHU.
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examples:
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- |
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mailbox@c883c404 {
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compatible = "amlogic,meson-gxbb-mhu";
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reg = <0xc883c404 0x4c>;
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interrupts = <208>, <209>, <210>;
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#mbox-cells = <1>;
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compatible = "amlogic,meson-gxbb-mhu";
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reg = <0xc883c404 0x4c>;
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interrupts = <208>, <209>, <210>;
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#mbox-cells = <1>;
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};

‎Documentation/devicetree/bindings/mailbox/apple,mailbox.yaml

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examples:
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- |
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mailbox@77408000 {
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compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4";
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reg = <0x77408000 0x4000>;
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interrupts = <1 583 4>, <1 584 4>, <1 585 4>, <1 586 4>;
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interrupt-names = "send-empty", "send-not-empty",
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"recv-empty", "recv-not-empty";
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#mbox-cells = <0>;
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};
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mailbox@77408000 {
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compatible = "apple,t8103-asc-mailbox", "apple,asc-mailbox-v4";
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reg = <0x77408000 0x4000>;
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interrupts = <1 583 4>, <1 584 4>, <1 585 4>, <1 586 4>;
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interrupt-names = "send-empty", "send-not-empty",
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"recv-empty", "recv-not-empty";
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#mbox-cells = <0>;
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};

‎Documentation/devicetree/bindings/mailbox/aspeed,ast2700-mailbox.yaml

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# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mailbox/aspeed,ast2700-mailbox.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: ASPEED AST2700 mailbox controller
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maintainers:
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- Jammy Huang <[email protected]>
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description: >
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ASPEED AST2700 has multiple processors that need to communicate with each
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other. The mailbox controller provides a way for these processors to send
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messages to each other. It is a hardware-based inter-processor communication
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mechanism that allows processors to send and receive messages through
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dedicated channels.
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The mailbox's tx/rx are independent, meaning that one processor can send a
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message while another processor is receiving a message simultaneously.
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There are 4 channels available for both tx and rx operations. Each channel
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has a FIFO buffer that can hold messages of a fixed size (32 bytes in this
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case).
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The mailbox controller also supports interrupt generation, allowing
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processors to notify each other when a message is available or when an event
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occurs.
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properties:
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compatible:
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const: aspeed,ast2700-mailbox
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reg:
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items:
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- description: TX control register
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- description: RX control register
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reg-names:
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items:
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- const: tx
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- const: rx
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interrupts:
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maxItems: 1
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"#mbox-cells":
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const: 1
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required:
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- compatible
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- reg
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- reg-names
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- interrupts
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- "#mbox-cells"
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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mailbox@12c1c200 {
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compatible = "aspeed,ast2700-mailbox";
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reg = <0x12c1c200 0x100>, <0x12c1c300 0x100>;
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reg-names = "tx", "rx";
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interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <1>;
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};

‎Documentation/devicetree/bindings/mailbox/brcm,bcm74110-mbox.yaml

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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/mailbox/brcm,bcm74110-mbox.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Broadcom BCM74110 Mailbox
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maintainers:
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- Justin Chen <[email protected]>
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- Florian Fainelli <[email protected]>
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description: Broadcom mailbox hardware first introduced with 74110
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properties:
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compatible:
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enum:
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- brcm,bcm74110-mbox
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reg:
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maxItems: 1
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interrupts:
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items:
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- description: RX doorbell and watermark interrupts
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- description: TX doorbell and watermark interrupts
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"#mbox-cells":
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const: 2
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description:
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The first cell is channel type and second cell is shared memory slot
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brcm,rx:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: RX Mailbox number
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brcm,tx:
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$ref: /schemas/types.yaml#/definitions/uint32
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description: TX Mailbox number
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required:
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- compatible
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- reg
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- interrupts
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- "#mbox-cells"
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- brcm,rx
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- brcm,tx
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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mailbox@a552000 {
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compatible = "brcm,bcm74110-mbox";
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reg = <0xa552000 0x1104>;
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interrupts = <GIC_SPI 0x67 IRQ_TYPE_LEVEL_HIGH>,
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<GIC_SPI 0x66 IRQ_TYPE_LEVEL_HIGH>;
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#mbox-cells = <0x2>;
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brcm,rx = <0x7>;
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brcm,tx = <0x6>;
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};

‎Documentation/devicetree/bindings/mailbox/nvidia,tegra186-hsp.yaml

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<dt-bindings/mailbox/tegra186-hsp.h>
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properties:
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$nodename:
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pattern: "^hsp@[0-9a-f]+$"
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compatible:
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oneOf:
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- enum:
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include <dt-bindings/mailbox/tegra186-hsp.h>
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hsp_top0: hsp@3c00000 {
131+
mailbox@3c00000 {
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compatible = "nvidia,tegra186-hsp";
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reg = <0x03c00000 0xa0000>;
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interrupts = <GIC_SPI 176 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "doorbell";
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#mbox-cells = <2>;
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};
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client {
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mboxes = <&hsp_top0 TEGRA_HSP_MBOX_TYPE_DB TEGRA_HSP_DB_MASTER_CCPLEX>;
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};

‎Documentation/devicetree/bindings/mailbox/qcom,apcs-kpss-global.yaml

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# Example apcs with msm8996
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#include <dt-bindings/interrupt-controller/arm-gic.h>
254-
apcs_glb: mailbox@9820000 {
254+
mailbox@9820000 {
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compatible = "qcom,msm8996-apcs-hmss-global";
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reg = <0x9820000 0x1000>;
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#mbox-cells = <1>;
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#clock-cells = <0>;
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};
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rpm-glink {
263-
compatible = "qcom,glink-rpm";
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interrupts = <GIC_SPI 168 IRQ_TYPE_EDGE_RISING>;
265-
qcom,rpm-msg-ram = <&rpm_msg_ram>;
266-
mboxes = <&apcs_glb 0>;
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};
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269262
# Example apcs with qcs404
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- |
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#define GCC_APSS_AHB_CLK_SRC 1

‎Documentation/devicetree/bindings/mailbox/qcom-ipcc.yaml

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compatible:
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items:
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- enum:
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- qcom,milos-ipcc
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- qcom,qcs8300-ipcc
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- qcom,qdu1000-ipcc
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- qcom,sa8255p-ipcc

‎Documentation/devicetree/bindings/mailbox/ti,omap-mailbox.yaml

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/* OMAP4 */
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#include <dt-bindings/interrupt-controller/arm-gic.h>
245-
mailbox: mailbox@4a0f4000 {
245+
mailbox@4a0f4000 {
246246
compatible = "ti,omap4-mailbox";
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reg = <0x4a0f4000 0x200>;
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interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
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260260
};
261261
};
262262
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dsp {
264-
mboxes = <&mailbox &mbox_dsp>;
265-
};
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268264
/* AM33xx */
269-
mailbox1: mailbox@480c8000 {
265+
mailbox@480c8000 {
270266
compatible = "ti,omap4-mailbox";
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reg = <0x480c8000 0x200>;
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interrupts = <77>;
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- |
285281
/* AM65x */
286-
mailbox0_cluster0: mailbox@31f80000 {
282+
mailbox@31f80000 {
287283
compatible = "ti,am654-mailbox";
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reg = <0x31f80000 0x200>;
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#mbox-cells = <1>;

‎Documentation/devicetree/bindings/mailbox/ti,secure-proxy.yaml

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- const: scfg
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reg:
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minItems: 3
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maxItems: 3
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interrupt-names:
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minItems: 1
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6969
#include <dt-bindings/interrupt-controller/arm-gic.h>
7070
secure_proxy: mailbox@32c00000 {
71-
compatible = "ti,am654-secure-proxy";
72-
#mbox-cells = <1>;
73-
reg-names = "target_data", "rt", "scfg";
74-
reg = <0x32c00000 0x100000>,
75-
<0x32400000 0x100000>,
76-
<0x32800000 0x100000>;
77-
interrupt-names = "rx_011";
78-
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
71+
compatible = "ti,am654-secure-proxy";
72+
#mbox-cells = <1>;
73+
reg-names = "target_data", "rt", "scfg";
74+
reg = <0x32c00000 0x100000>,
75+
<0x32400000 0x100000>,
76+
<0x32800000 0x100000>;
77+
interrupt-names = "rx_011";
78+
interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
7979
};

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