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masneybbebarino
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clk: imx: pllv3: convert from round_rate() to determine_rate()
The round_rate() clk ops is deprecated, so migrate this driver from round_rate() to determine_rate() using the Coccinelle semantic patch on the cover letter of this series. Signed-off-by: Brian Masney <[email protected]> Link: https://lore.kernel.org/r/[email protected] Reviewed-by: Peng Fan <[email protected]> Signed-off-by: Stephen Boyd <[email protected]>
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drivers/clk/imx/clk-pllv3.c

Lines changed: 40 additions & 32 deletions
Original file line numberDiff line numberDiff line change
@@ -117,13 +117,14 @@ static unsigned long clk_pllv3_recalc_rate(struct clk_hw *hw,
117117
return (div == 1) ? parent_rate * 22 : parent_rate * 20;
118118
}
119119

120-
static long clk_pllv3_round_rate(struct clk_hw *hw, unsigned long rate,
121-
unsigned long *prate)
120+
static int clk_pllv3_determine_rate(struct clk_hw *hw,
121+
struct clk_rate_request *req)
122122
{
123-
unsigned long parent_rate = *prate;
123+
unsigned long parent_rate = req->best_parent_rate;
124124

125-
return (rate >= parent_rate * 22) ? parent_rate * 22 :
126-
parent_rate * 20;
125+
req->rate = (req->rate >= parent_rate * 22) ? parent_rate * 22 : parent_rate * 20;
126+
127+
return 0;
127128
}
128129

129130
static int clk_pllv3_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -152,7 +153,7 @@ static const struct clk_ops clk_pllv3_ops = {
152153
.unprepare = clk_pllv3_unprepare,
153154
.is_prepared = clk_pllv3_is_prepared,
154155
.recalc_rate = clk_pllv3_recalc_rate,
155-
.round_rate = clk_pllv3_round_rate,
156+
.determine_rate = clk_pllv3_determine_rate,
156157
.set_rate = clk_pllv3_set_rate,
157158
};
158159

@@ -165,21 +166,23 @@ static unsigned long clk_pllv3_sys_recalc_rate(struct clk_hw *hw,
165166
return parent_rate * div / 2;
166167
}
167168

168-
static long clk_pllv3_sys_round_rate(struct clk_hw *hw, unsigned long rate,
169-
unsigned long *prate)
169+
static int clk_pllv3_sys_determine_rate(struct clk_hw *hw,
170+
struct clk_rate_request *req)
170171
{
171-
unsigned long parent_rate = *prate;
172+
unsigned long parent_rate = req->best_parent_rate;
172173
unsigned long min_rate = parent_rate * 54 / 2;
173174
unsigned long max_rate = parent_rate * 108 / 2;
174175
u32 div;
175176

176-
if (rate > max_rate)
177-
rate = max_rate;
178-
else if (rate < min_rate)
179-
rate = min_rate;
180-
div = rate * 2 / parent_rate;
177+
if (req->rate > max_rate)
178+
req->rate = max_rate;
179+
else if (req->rate < min_rate)
180+
req->rate = min_rate;
181+
div = req->rate * 2 / parent_rate;
181182

182-
return parent_rate * div / 2;
183+
req->rate = parent_rate * div / 2;
184+
185+
return 0;
183186
}
184187

185188
static int clk_pllv3_sys_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -207,7 +210,7 @@ static const struct clk_ops clk_pllv3_sys_ops = {
207210
.unprepare = clk_pllv3_unprepare,
208211
.is_prepared = clk_pllv3_is_prepared,
209212
.recalc_rate = clk_pllv3_sys_recalc_rate,
210-
.round_rate = clk_pllv3_sys_round_rate,
213+
.determine_rate = clk_pllv3_sys_determine_rate,
211214
.set_rate = clk_pllv3_sys_set_rate,
212215
};
213216

@@ -226,27 +229,27 @@ static unsigned long clk_pllv3_av_recalc_rate(struct clk_hw *hw,
226229
return parent_rate * div + (unsigned long)temp64;
227230
}
228231

229-
static long clk_pllv3_av_round_rate(struct clk_hw *hw, unsigned long rate,
230-
unsigned long *prate)
232+
static int clk_pllv3_av_determine_rate(struct clk_hw *hw,
233+
struct clk_rate_request *req)
231234
{
232-
unsigned long parent_rate = *prate;
235+
unsigned long parent_rate = req->best_parent_rate;
233236
unsigned long min_rate = parent_rate * 27;
234237
unsigned long max_rate = parent_rate * 54;
235238
u32 div;
236239
u32 mfn, mfd = 1000000;
237240
u32 max_mfd = 0x3FFFFFFF;
238241
u64 temp64;
239242

240-
if (rate > max_rate)
241-
rate = max_rate;
242-
else if (rate < min_rate)
243-
rate = min_rate;
243+
if (req->rate > max_rate)
244+
req->rate = max_rate;
245+
else if (req->rate < min_rate)
246+
req->rate = min_rate;
244247

245248
if (parent_rate <= max_mfd)
246249
mfd = parent_rate;
247250

248-
div = rate / parent_rate;
249-
temp64 = (u64) (rate - div * parent_rate);
251+
div = req->rate / parent_rate;
252+
temp64 = (u64) (req->rate - div * parent_rate);
250253
temp64 *= mfd;
251254
temp64 = div64_ul(temp64, parent_rate);
252255
mfn = temp64;
@@ -255,7 +258,9 @@ static long clk_pllv3_av_round_rate(struct clk_hw *hw, unsigned long rate,
255258
temp64 *= mfn;
256259
do_div(temp64, mfd);
257260

258-
return parent_rate * div + (unsigned long)temp64;
261+
req->rate = parent_rate * div + (unsigned long)temp64;
262+
263+
return 0;
259264
}
260265

261266
static int clk_pllv3_av_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -296,7 +301,7 @@ static const struct clk_ops clk_pllv3_av_ops = {
296301
.unprepare = clk_pllv3_unprepare,
297302
.is_prepared = clk_pllv3_is_prepared,
298303
.recalc_rate = clk_pllv3_av_recalc_rate,
299-
.round_rate = clk_pllv3_av_round_rate,
304+
.determine_rate = clk_pllv3_av_determine_rate,
300305
.set_rate = clk_pllv3_av_set_rate,
301306
};
302307

@@ -355,12 +360,15 @@ static unsigned long clk_pllv3_vf610_recalc_rate(struct clk_hw *hw,
355360
return clk_pllv3_vf610_mf_to_rate(parent_rate, mf);
356361
}
357362

358-
static long clk_pllv3_vf610_round_rate(struct clk_hw *hw, unsigned long rate,
359-
unsigned long *prate)
363+
static int clk_pllv3_vf610_determine_rate(struct clk_hw *hw,
364+
struct clk_rate_request *req)
360365
{
361-
struct clk_pllv3_vf610_mf mf = clk_pllv3_vf610_rate_to_mf(*prate, rate);
366+
struct clk_pllv3_vf610_mf mf = clk_pllv3_vf610_rate_to_mf(req->best_parent_rate,
367+
req->rate);
368+
369+
req->rate = clk_pllv3_vf610_mf_to_rate(req->best_parent_rate, mf);
362370

363-
return clk_pllv3_vf610_mf_to_rate(*prate, mf);
371+
return 0;
364372
}
365373

366374
static int clk_pllv3_vf610_set_rate(struct clk_hw *hw, unsigned long rate,
@@ -389,7 +397,7 @@ static const struct clk_ops clk_pllv3_vf610_ops = {
389397
.unprepare = clk_pllv3_unprepare,
390398
.is_prepared = clk_pllv3_is_prepared,
391399
.recalc_rate = clk_pllv3_vf610_recalc_rate,
392-
.round_rate = clk_pllv3_vf610_round_rate,
400+
.determine_rate = clk_pllv3_vf610_determine_rate,
393401
.set_rate = clk_pllv3_vf610_set_rate,
394402
};
395403

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