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linuswlinusw
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Merge tag 'renesas-pinctrl-for-v6.17-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel
pinctrl: renesas: Updates for v6.17 - Use the new GPIO line value setter callbacks, - Validate pins before setting a mux function on RZ/G2L. Signed-off-by: Linus Walleij <[email protected]>
2 parents b306791 + 5216103 commit eaa655c

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5 files changed

+47
-34
lines changed

5 files changed

+47
-34
lines changed

‎drivers/pinctrl/renesas/gpio.c

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -189,9 +189,11 @@ static int gpio_pin_get(struct gpio_chip *gc, unsigned offset)
189189
return (gpio_read_data_reg(chip, reg->info) >> pos) & 1;
190190
}
191191

192-
static void gpio_pin_set(struct gpio_chip *gc, unsigned offset, int value)
192+
static int gpio_pin_set(struct gpio_chip *gc, unsigned int offset, int value)
193193
{
194194
gpio_pin_set_value(gpiochip_get_data(gc), offset, value);
195+
196+
return 0;
195197
}
196198

197199
static int gpio_pin_to_irq(struct gpio_chip *gc, unsigned offset)
@@ -232,7 +234,7 @@ static int gpio_pin_setup(struct sh_pfc_chip *chip)
232234
gc->direction_input = gpio_pin_direction_input;
233235
gc->get = gpio_pin_get;
234236
gc->direction_output = gpio_pin_direction_output;
235-
gc->set = gpio_pin_set;
237+
gc->set_rv = gpio_pin_set;
236238
gc->to_irq = gpio_pin_to_irq;
237239

238240
gc->label = pfc->info->name;

‎drivers/pinctrl/renesas/pinctrl-rza1.c

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -830,12 +830,13 @@ static int rza1_gpio_get(struct gpio_chip *chip, unsigned int gpio)
830830
return rza1_pin_get(port, gpio);
831831
}
832832

833-
static void rza1_gpio_set(struct gpio_chip *chip, unsigned int gpio,
834-
int value)
833+
static int rza1_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value)
835834
{
836835
struct rza1_port *port = gpiochip_get_data(chip);
837836

838837
rza1_pin_set(port, gpio, value);
838+
839+
return 0;
839840
}
840841

841842
static const struct gpio_chip rza1_gpiochip_template = {
@@ -845,7 +846,7 @@ static const struct gpio_chip rza1_gpiochip_template = {
845846
.direction_input = rza1_gpio_direction_input,
846847
.direction_output = rza1_gpio_direction_output,
847848
.get = rza1_gpio_get,
848-
.set = rza1_gpio_set,
849+
.set_rv = rza1_gpio_set,
849850
};
850851
/* ----------------------------------------------------------------------------
851852
* pinctrl operations

‎drivers/pinctrl/renesas/pinctrl-rza2.c

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -172,8 +172,7 @@ static int rza2_chip_get(struct gpio_chip *chip, unsigned int offset)
172172
return !!(readb(priv->base + RZA2_PIDR(port)) & BIT(pin));
173173
}
174174

175-
static void rza2_chip_set(struct gpio_chip *chip, unsigned int offset,
176-
int value)
175+
static int rza2_chip_set(struct gpio_chip *chip, unsigned int offset, int value)
177176
{
178177
struct rza2_pinctrl_priv *priv = gpiochip_get_data(chip);
179178
u8 port = RZA2_PIN_ID_TO_PORT(offset);
@@ -188,6 +187,8 @@ static void rza2_chip_set(struct gpio_chip *chip, unsigned int offset,
188187
new_value &= ~BIT(pin);
189188

190189
writeb(new_value, priv->base + RZA2_PODR(port));
190+
191+
return 0;
191192
}
192193

193194
static int rza2_chip_direction_output(struct gpio_chip *chip,
@@ -236,7 +237,7 @@ static struct gpio_chip chip = {
236237
.direction_input = rza2_chip_direction_input,
237238
.direction_output = rza2_chip_direction_output,
238239
.get = rza2_chip_get,
239-
.set = rza2_chip_set,
240+
.set_rv = rza2_chip_set,
240241
};
241242

242243
static int rza2_gpio_register(struct rza2_pinctrl_priv *priv)

‎drivers/pinctrl/renesas/pinctrl-rzg2l.c

Lines changed: 30 additions & 23 deletions
Original file line numberDiff line numberDiff line change
@@ -493,6 +493,23 @@ static void rzv2h_pmc_writeb(struct rzg2l_pinctrl *pctrl, u8 val, u16 offset)
493493
writeb(pwpr & ~PWPR_REGWE_A, pctrl->base + regs->pwpr);
494494
}
495495

496+
static int rzg2l_validate_pin(struct rzg2l_pinctrl *pctrl,
497+
u64 cfg, u32 port, u8 bit)
498+
{
499+
u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
500+
u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(cfg);
501+
u64 data;
502+
503+
if (!(pinmap & BIT(bit)) || port >= pctrl->data->n_port_pins)
504+
return -EINVAL;
505+
506+
data = pctrl->data->port_pin_configs[port];
507+
if (off != RZG2L_PIN_CFG_TO_PORT_OFFSET(data))
508+
return -EINVAL;
509+
510+
return 0;
511+
}
512+
496513
static void rzg2l_pinctrl_set_pfc_mode(struct rzg2l_pinctrl *pctrl,
497514
u8 pin, u8 off, u8 func)
498515
{
@@ -536,6 +553,7 @@ static int rzg2l_pinctrl_set_mux(struct pinctrl_dev *pctldev,
536553
unsigned int i, *psel_val;
537554
struct group_desc *group;
538555
const unsigned int *pins;
556+
int ret;
539557

540558
func = pinmux_generic_get_function(pctldev, func_selector);
541559
if (!func)
@@ -552,6 +570,10 @@ static int rzg2l_pinctrl_set_mux(struct pinctrl_dev *pctldev,
552570
u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(*pin_data);
553571
u32 pin = RZG2L_PIN_ID_TO_PIN(pins[i]);
554572

573+
ret = rzg2l_validate_pin(pctrl, *pin_data, RZG2L_PIN_ID_TO_PORT(pins[i]), pin);
574+
if (ret)
575+
return ret;
576+
555577
dev_dbg(pctrl->dev, "port:%u pin: %u off:%x PSEL:%u\n",
556578
RZG2L_PIN_ID_TO_PORT(pins[i]), pin, off, psel_val[i] - hwcfg->func_base);
557579

@@ -806,23 +828,6 @@ static int rzg2l_dt_node_to_map(struct pinctrl_dev *pctldev,
806828
return ret;
807829
}
808830

809-
static int rzg2l_validate_gpio_pin(struct rzg2l_pinctrl *pctrl,
810-
u64 cfg, u32 port, u8 bit)
811-
{
812-
u8 pinmap = FIELD_GET(PIN_CFG_PIN_MAP_MASK, cfg);
813-
u32 off = RZG2L_PIN_CFG_TO_PORT_OFFSET(cfg);
814-
u64 data;
815-
816-
if (!(pinmap & BIT(bit)) || port >= pctrl->data->n_port_pins)
817-
return -EINVAL;
818-
819-
data = pctrl->data->port_pin_configs[port];
820-
if (off != RZG2L_PIN_CFG_TO_PORT_OFFSET(data))
821-
return -EINVAL;
822-
823-
return 0;
824-
}
825-
826831
static u32 rzg2l_read_pin_config(struct rzg2l_pinctrl *pctrl, u32 offset,
827832
u8 bit, u32 mask)
828833
{
@@ -1287,7 +1292,7 @@ static int rzg2l_pinctrl_pinconf_get(struct pinctrl_dev *pctldev,
12871292
} else {
12881293
bit = RZG2L_PIN_ID_TO_PIN(_pin);
12891294

1290-
if (rzg2l_validate_gpio_pin(pctrl, *pin_data, RZG2L_PIN_ID_TO_PORT(_pin), bit))
1295+
if (rzg2l_validate_pin(pctrl, *pin_data, RZG2L_PIN_ID_TO_PORT(_pin), bit))
12911296
return -EINVAL;
12921297
}
12931298

@@ -1447,7 +1452,7 @@ static int rzg2l_pinctrl_pinconf_set(struct pinctrl_dev *pctldev,
14471452
} else {
14481453
bit = RZG2L_PIN_ID_TO_PIN(_pin);
14491454

1450-
if (rzg2l_validate_gpio_pin(pctrl, *pin_data, RZG2L_PIN_ID_TO_PORT(_pin), bit))
1455+
if (rzg2l_validate_pin(pctrl, *pin_data, RZG2L_PIN_ID_TO_PORT(_pin), bit))
14511456
return -EINVAL;
14521457
}
14531458

@@ -1687,7 +1692,7 @@ static int rzg2l_gpio_request(struct gpio_chip *chip, unsigned int offset)
16871692
u8 reg8;
16881693
int ret;
16891694

1690-
ret = rzg2l_validate_gpio_pin(pctrl, *pin_data, port, bit);
1695+
ret = rzg2l_validate_pin(pctrl, *pin_data, port, bit);
16911696
if (ret)
16921697
return ret;
16931698

@@ -1758,8 +1763,8 @@ static int rzg2l_gpio_direction_input(struct gpio_chip *chip,
17581763
return 0;
17591764
}
17601765

1761-
static void rzg2l_gpio_set(struct gpio_chip *chip, unsigned int offset,
1762-
int value)
1766+
static int rzg2l_gpio_set(struct gpio_chip *chip, unsigned int offset,
1767+
int value)
17631768
{
17641769
struct rzg2l_pinctrl *pctrl = gpiochip_get_data(chip);
17651770
const struct pinctrl_pin_desc *pin_desc = &pctrl->desc.pins[offset];
@@ -1779,6 +1784,8 @@ static void rzg2l_gpio_set(struct gpio_chip *chip, unsigned int offset,
17791784
writeb(reg8 & ~BIT(bit), pctrl->base + P(off));
17801785

17811786
spin_unlock_irqrestore(&pctrl->lock, flags);
1787+
1788+
return 0;
17821789
}
17831790

17841791
static int rzg2l_gpio_direction_output(struct gpio_chip *chip,
@@ -2788,7 +2795,7 @@ static int rzg2l_gpio_register(struct rzg2l_pinctrl *pctrl)
27882795
chip->direction_input = rzg2l_gpio_direction_input;
27892796
chip->direction_output = rzg2l_gpio_direction_output;
27902797
chip->get = rzg2l_gpio_get;
2791-
chip->set = rzg2l_gpio_set;
2798+
chip->set_rv = rzg2l_gpio_set;
27922799
chip->label = name;
27932800
chip->parent = pctrl->dev;
27942801
chip->owner = THIS_MODULE;

‎drivers/pinctrl/renesas/pinctrl-rzv2m.c

Lines changed: 5 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -790,14 +790,16 @@ static int rzv2m_gpio_direction_input(struct gpio_chip *chip,
790790
return 0;
791791
}
792792

793-
static void rzv2m_gpio_set(struct gpio_chip *chip, unsigned int offset,
794-
int value)
793+
static int rzv2m_gpio_set(struct gpio_chip *chip, unsigned int offset,
794+
int value)
795795
{
796796
struct rzv2m_pinctrl *pctrl = gpiochip_get_data(chip);
797797
u32 port = RZV2M_PIN_ID_TO_PORT(offset);
798798
u8 bit = RZV2M_PIN_ID_TO_PIN(offset);
799799

800800
rzv2m_writel_we(pctrl->base + DO(port), bit, !!value);
801+
802+
return 0;
801803
}
802804

803805
static int rzv2m_gpio_direction_output(struct gpio_chip *chip,
@@ -955,7 +957,7 @@ static int rzv2m_gpio_register(struct rzv2m_pinctrl *pctrl)
955957
chip->direction_input = rzv2m_gpio_direction_input;
956958
chip->direction_output = rzv2m_gpio_direction_output;
957959
chip->get = rzv2m_gpio_get;
958-
chip->set = rzv2m_gpio_set;
960+
chip->set_rv = rzv2m_gpio_set;
959961
chip->label = name;
960962
chip->parent = pctrl->dev;
961963
chip->owner = THIS_MODULE;

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