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Documentation: KVM: arm64: Describe VGICv3 registers writable pre-init
KVM allows userspace to control GICD_IIDR.Revision and GICD_TYPER2.nASSGIcap prior to initialization for the sake of provisioning the guest-visible feature set. Document the userspace expectations surrounding accesses to these registers. Reviewed-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Oliver Upton <[email protected]>
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Documentation/virt/kvm/devices/arm-vgic-v3.rst

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-ENXIO The group or attribute is unknown/unsupported for this device
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or hardware support is missing.
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-EFAULT Invalid user pointer for attr->addr.
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-EBUSY Attempt to write a register that is read-only after
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initialization
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======= =============================================================
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Note that distributor fields are not banked, but return the same value
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regardless of the mpidr used to access the register.
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Userspace is allowed to write the following register fields prior to
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initialization of the VGIC:
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=====================
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GICD_IIDR.Revision
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GICD_TYPER2.nASSGIcap
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=====================
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GICD_IIDR.Revision is updated when the KVM implementation is changed in a
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way directly observable by the guest or userspace. Userspace should read
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GICD_IIDR from KVM and write back the read value to confirm its expected
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behavior.
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GICD_TYPER2.nASSGIcap allows userspace to control the support of SGIs
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without an active state. At VGIC creation the field resets to the
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maximum capability of the system. Userspace is expected to read the field
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to determine the supported value(s) before writing to the field.
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The GICD_STATUSR and GICR_STATUSR registers are architecturally defined such
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that a write of a clear bit has no effect, whereas a write with a set bit
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clears that value. To allow userspace to freely set the values of these two

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