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mellanoxbmcdvhart
mellanoxbmc
authored and
dvhart
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platform/x86: mlx-platform: Add LED platform driver activation
Add LED platform driver activation from mlx-platform. This LED driver uses the same regmap infrastructure as others Mellanox platform drivers, so LED specific registers description is added. System LED configuration depends on system type. To support all the relevant types per system type LED descriptions are defined for passing to LED platform driver. Signed-off-by: Vadim Pasternak <[email protected]> Signed-off-by: Darren Hart (VMware) <[email protected]>
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‎drivers/platform/x86/mlx-platform.c‎

Lines changed: 258 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -47,6 +47,11 @@
4747
/* LPC bus IO offsets */
4848
#define MLXPLAT_CPLD_LPC_I2C_BASE_ADRR 0x2000
4949
#define MLXPLAT_CPLD_LPC_REG_BASE_ADRR 0x2500
50+
#define MLXPLAT_CPLD_LPC_REG_LED1_OFFSET 0x20
51+
#define MLXPLAT_CPLD_LPC_REG_LED2_OFFSET 0x21
52+
#define MLXPLAT_CPLD_LPC_REG_LED3_OFFSET 0x22
53+
#define MLXPLAT_CPLD_LPC_REG_LED4_OFFSET 0x23
54+
#define MLXPLAT_CPLD_LPC_REG_LED5_OFFSET 0x24
5055
#define MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET 0x3a
5156
#define MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET 0x3b
5257
#define MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET 0x40
@@ -84,6 +89,8 @@
8489
#define MLXPLAT_CPLD_PWR_MASK GENMASK(1, 0)
8590
#define MLXPLAT_CPLD_FAN_MASK GENMASK(3, 0)
8691
#define MLXPLAT_CPLD_FAN_NG_MASK GENMASK(5, 0)
92+
#define MLXPLAT_CPLD_LED_LO_NIBBLE_MASK GENMASK(7, 4)
93+
#define MLXPLAT_CPLD_LED_HI_NIBBLE_MASK GENMASK(3, 0)
8794

8895
/* Default I2C parent bus number */
8996
#define MLXPLAT_CPLD_PHYS_ADAPTER_DEF_NR 1
@@ -114,11 +121,13 @@
114121
* @pdev_i2c - i2c controller platform device
115122
* @pdev_mux - array of mux platform devices
116123
* @pdev_hotplug - hotplug platform devices
124+
* @pdev_led - led platform devices
117125
*/
118126
struct mlxplat_priv {
119127
struct platform_device *pdev_i2c;
120128
struct platform_device *pdev_mux[MLXPLAT_CPLD_LPC_MUX_DEVS];
121129
struct platform_device *pdev_hotplug;
130+
struct platform_device *pdev_led;
122131
};
123132

124133
/* Regions for LPC I2C controller and LPC base register space */
@@ -592,9 +601,227 @@ struct mlxreg_core_hotplug_platform_data mlxplat_mlxcpld_default_ng_data = {
592601
.mask_low = MLXPLAT_CPLD_LOW_AGGR_MASK_LOW,
593602
};
594603

604+
/* Platform led default data */
605+
static struct mlxreg_core_data mlxplat_mlxcpld_default_led_data[] = {
606+
{
607+
.label = "status:green",
608+
.reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
609+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
610+
},
611+
{
612+
.label = "status:red",
613+
.reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
614+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK
615+
},
616+
{
617+
.label = "psu:green",
618+
.reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
619+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
620+
},
621+
{
622+
.label = "psu:red",
623+
.reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
624+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
625+
},
626+
{
627+
.label = "fan1:green",
628+
.reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
629+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
630+
},
631+
{
632+
.label = "fan1:red",
633+
.reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
634+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
635+
},
636+
{
637+
.label = "fan2:green",
638+
.reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
639+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
640+
},
641+
{
642+
.label = "fan2:red",
643+
.reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
644+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
645+
},
646+
{
647+
.label = "fan3:green",
648+
.reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
649+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
650+
},
651+
{
652+
.label = "fan3:red",
653+
.reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
654+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
655+
},
656+
{
657+
.label = "fan4:green",
658+
.reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
659+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
660+
},
661+
{
662+
.label = "fan4:red",
663+
.reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
664+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
665+
},
666+
};
667+
668+
static struct mlxreg_core_platform_data mlxplat_default_led_data = {
669+
.data = mlxplat_mlxcpld_default_led_data,
670+
.counter = ARRAY_SIZE(mlxplat_mlxcpld_default_led_data),
671+
};
672+
673+
/* Platform led MSN21xx system family data */
674+
static struct mlxreg_core_data mlxplat_mlxcpld_msn21xx_led_data[] = {
675+
{
676+
.label = "status:green",
677+
.reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
678+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
679+
},
680+
{
681+
.label = "status:red",
682+
.reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
683+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK
684+
},
685+
{
686+
.label = "fan:green",
687+
.reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
688+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
689+
},
690+
{
691+
.label = "fan:red",
692+
.reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
693+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
694+
},
695+
{
696+
.label = "psu1:green",
697+
.reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
698+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
699+
},
700+
{
701+
.label = "psu1:red",
702+
.reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
703+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
704+
},
705+
{
706+
.label = "psu2:green",
707+
.reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
708+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
709+
},
710+
{
711+
.label = "psu2:red",
712+
.reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
713+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
714+
},
715+
{
716+
.label = "uid:blue",
717+
.reg = MLXPLAT_CPLD_LPC_REG_LED5_OFFSET,
718+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
719+
},
720+
};
721+
722+
static struct mlxreg_core_platform_data mlxplat_msn21xx_led_data = {
723+
.data = mlxplat_mlxcpld_msn21xx_led_data,
724+
.counter = ARRAY_SIZE(mlxplat_mlxcpld_msn21xx_led_data),
725+
};
726+
727+
/* Platform led for default data for 200GbE systems */
728+
static struct mlxreg_core_data mlxplat_mlxcpld_default_ng_led_data[] = {
729+
{
730+
.label = "status:green",
731+
.reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
732+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
733+
},
734+
{
735+
.label = "status:orange",
736+
.reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
737+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK
738+
},
739+
{
740+
.label = "psu:green",
741+
.reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
742+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
743+
},
744+
{
745+
.label = "psu:orange",
746+
.reg = MLXPLAT_CPLD_LPC_REG_LED1_OFFSET,
747+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
748+
},
749+
{
750+
.label = "fan1:green",
751+
.reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
752+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
753+
},
754+
{
755+
.label = "fan1:orange",
756+
.reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
757+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
758+
},
759+
{
760+
.label = "fan2:green",
761+
.reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
762+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
763+
},
764+
{
765+
.label = "fan2:orange",
766+
.reg = MLXPLAT_CPLD_LPC_REG_LED2_OFFSET,
767+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
768+
},
769+
{
770+
.label = "fan3:green",
771+
.reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
772+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
773+
},
774+
{
775+
.label = "fan3:orange",
776+
.reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
777+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
778+
},
779+
{
780+
.label = "fan4:green",
781+
.reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
782+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
783+
},
784+
{
785+
.label = "fan4:orange",
786+
.reg = MLXPLAT_CPLD_LPC_REG_LED3_OFFSET,
787+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
788+
},
789+
{
790+
.label = "fan5:green",
791+
.reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
792+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
793+
},
794+
{
795+
.label = "fan5:orange",
796+
.reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
797+
.mask = MLXPLAT_CPLD_LED_LO_NIBBLE_MASK,
798+
},
799+
{
800+
.label = "fan6:green",
801+
.reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
802+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
803+
},
804+
{
805+
.label = "fan6:orange",
806+
.reg = MLXPLAT_CPLD_LPC_REG_LED4_OFFSET,
807+
.mask = MLXPLAT_CPLD_LED_HI_NIBBLE_MASK,
808+
},
809+
};
810+
811+
static struct mlxreg_core_platform_data mlxplat_default_ng_led_data = {
812+
.data = mlxplat_mlxcpld_default_ng_led_data,
813+
.counter = ARRAY_SIZE(mlxplat_mlxcpld_default_ng_led_data),
814+
};
815+
816+
595817
static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
596818
{
597819
switch (reg) {
820+
case MLXPLAT_CPLD_LPC_REG_LED1_OFFSET:
821+
case MLXPLAT_CPLD_LPC_REG_LED2_OFFSET:
822+
case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET:
823+
case MLXPLAT_CPLD_LPC_REG_LED4_OFFSET:
824+
case MLXPLAT_CPLD_LPC_REG_LED5_OFFSET:
598825
case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET:
599826
case MLXPLAT_CPLD_LPC_REG_AGGRLO_MASK_OFFSET:
600827
case MLXPLAT_CPLD_LPC_REG_PSU_EVENT_OFFSET:
@@ -611,6 +838,11 @@ static bool mlxplat_mlxcpld_writeable_reg(struct device *dev, unsigned int reg)
611838
static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
612839
{
613840
switch (reg) {
841+
case MLXPLAT_CPLD_LPC_REG_LED1_OFFSET:
842+
case MLXPLAT_CPLD_LPC_REG_LED2_OFFSET:
843+
case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET:
844+
case MLXPLAT_CPLD_LPC_REG_LED4_OFFSET:
845+
case MLXPLAT_CPLD_LPC_REG_LED5_OFFSET:
614846
case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET:
615847
case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET:
616848
case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET:
@@ -632,6 +864,11 @@ static bool mlxplat_mlxcpld_readable_reg(struct device *dev, unsigned int reg)
632864
static bool mlxplat_mlxcpld_volatile_reg(struct device *dev, unsigned int reg)
633865
{
634866
switch (reg) {
867+
case MLXPLAT_CPLD_LPC_REG_LED1_OFFSET:
868+
case MLXPLAT_CPLD_LPC_REG_LED2_OFFSET:
869+
case MLXPLAT_CPLD_LPC_REG_LED3_OFFSET:
870+
case MLXPLAT_CPLD_LPC_REG_LED4_OFFSET:
871+
case MLXPLAT_CPLD_LPC_REG_LED5_OFFSET:
635872
case MLXPLAT_CPLD_LPC_REG_AGGR_OFFSET:
636873
case MLXPLAT_CPLD_LPC_REG_AGGR_MASK_OFFSET:
637874
case MLXPLAT_CPLD_LPC_REG_AGGRLO_OFFSET:
@@ -692,6 +929,7 @@ static struct resource mlxplat_mlxcpld_resources[] = {
692929

693930
static struct platform_device *mlxplat_dev;
694931
static struct mlxreg_core_hotplug_platform_data *mlxplat_hotplug;
932+
static struct mlxreg_core_platform_data *mlxplat_led;
695933

696934
static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi)
697935
{
@@ -705,6 +943,7 @@ static int __init mlxplat_dmi_default_matched(const struct dmi_system_id *dmi)
705943
mlxplat_hotplug = &mlxplat_mlxcpld_default_data;
706944
mlxplat_hotplug->deferred_nr =
707945
mlxplat_default_channels[i - 1][MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
946+
mlxplat_led = &mlxplat_default_led_data;
708947

709948
return 1;
710949
};
@@ -721,6 +960,7 @@ static int __init mlxplat_dmi_msn21xx_matched(const struct dmi_system_id *dmi)
721960
mlxplat_hotplug = &mlxplat_mlxcpld_msn21xx_data;
722961
mlxplat_hotplug->deferred_nr =
723962
mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
963+
mlxplat_led = &mlxplat_msn21xx_led_data;
724964

725965
return 1;
726966
};
@@ -737,6 +977,7 @@ static int __init mlxplat_dmi_msn274x_matched(const struct dmi_system_id *dmi)
737977
mlxplat_hotplug = &mlxplat_mlxcpld_msn274x_data;
738978
mlxplat_hotplug->deferred_nr =
739979
mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
980+
mlxplat_led = &mlxplat_default_led_data;
740981

741982
return 1;
742983
};
@@ -753,6 +994,7 @@ static int __init mlxplat_dmi_msn201x_matched(const struct dmi_system_id *dmi)
753994
mlxplat_hotplug = &mlxplat_mlxcpld_msn201x_data;
754995
mlxplat_hotplug->deferred_nr =
755996
mlxplat_default_channels[i - 1][MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
997+
mlxplat_led = &mlxplat_default_ng_led_data;
756998

757999
return 1;
7581000
};
@@ -769,6 +1011,7 @@ static int __init mlxplat_dmi_qmb7xx_matched(const struct dmi_system_id *dmi)
7691011
mlxplat_hotplug = &mlxplat_mlxcpld_default_ng_data;
7701012
mlxplat_hotplug->deferred_nr =
7711013
mlxplat_msn21xx_channels[MLXPLAT_CPLD_GRP_CHNL_NUM - 1];
1014+
mlxplat_led = &mlxplat_msn21xx_led_data;
7721015

7731016
return 1;
7741017
};
@@ -990,14 +1233,27 @@ static int __init mlxplat_init(void)
9901233
goto fail_platform_mux_register;
9911234
}
9921235

1236+
/* Add LED driver. */
1237+
mlxplat_led->regmap = mlxplat_hotplug->regmap;
1238+
priv->pdev_led = platform_device_register_resndata(
1239+
&mlxplat_dev->dev, "leds-mlxreg",
1240+
PLATFORM_DEVID_NONE, NULL, 0,
1241+
mlxplat_led, sizeof(*mlxplat_led));
1242+
if (IS_ERR(priv->pdev_led)) {
1243+
err = PTR_ERR(priv->pdev_led);
1244+
goto fail_platform_hotplug_register;
1245+
}
1246+
9931247
/* Sync registers with hardware. */
9941248
regcache_mark_dirty(mlxplat_hotplug->regmap);
9951249
err = regcache_sync(mlxplat_hotplug->regmap);
9961250
if (err)
997-
goto fail_platform_hotplug_register;
1251+
goto fail_platform_led_register;
9981252

9991253
return 0;
10001254

1255+
fail_platform_led_register:
1256+
platform_device_unregister(priv->pdev_led);
10011257
fail_platform_hotplug_register:
10021258
platform_device_unregister(priv->pdev_hotplug);
10031259
fail_platform_mux_register:
@@ -1016,6 +1272,7 @@ static void __exit mlxplat_exit(void)
10161272
struct mlxplat_priv *priv = platform_get_drvdata(mlxplat_dev);
10171273
int i;
10181274

1275+
platform_device_unregister(priv->pdev_led);
10191276
platform_device_unregister(priv->pdev_hotplug);
10201277

10211278
for (i = ARRAY_SIZE(mlxplat_mux_data) - 1; i >= 0 ; i--)

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