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Rakesh Babudavem330
Rakesh Babu
authored and
davem330
committed
octeontx2-af: cn10k: Add RPM LMAC pause frame support
Flow control configuration is different for CGX(Octeontx2) and RPM(CN10K) functional blocks. This patch adds the necessary changes for RPM to support 802.3 pause frames configuration on cn10k platforms. Signed-off-by: Rakesh Babu <[email protected]> Signed-off-by: Geetha sowjanya <[email protected]> Signed-off-by: Sunil Kovvuri Goutham <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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6 files changed

+201
-23
lines changed

6 files changed

+201
-23
lines changed

‎drivers/net/ethernet/marvell/octeontx2/af/cgx.c‎

Lines changed: 13 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -307,9 +307,6 @@ void cgx_lmac_enadis_rx_pause_fwding(void *cgxd, int lmac_id, bool enable)
307307
struct cgx *cgx = cgxd;
308308
u64 cfg;
309309

310-
if (is_dev_rpm(cgx))
311-
return;
312-
313310
if (!cgx)
314311
return;
315312

@@ -452,8 +449,8 @@ int cgx_lmac_tx_enable(void *cgxd, int lmac_id, bool enable)
452449
return !!(last & DATA_PKT_TX_EN);
453450
}
454451

455-
int cgx_lmac_get_pause_frm(void *cgxd, int lmac_id,
456-
u8 *tx_pause, u8 *rx_pause)
452+
static int cgx_lmac_get_pause_frm_status(void *cgxd, int lmac_id,
453+
u8 *tx_pause, u8 *rx_pause)
457454
{
458455
struct cgx *cgx = cgxd;
459456
u64 cfg;
@@ -472,8 +469,8 @@ int cgx_lmac_get_pause_frm(void *cgxd, int lmac_id,
472469
return 0;
473470
}
474471

475-
int cgx_lmac_set_pause_frm(void *cgxd, int lmac_id,
476-
u8 tx_pause, u8 rx_pause)
472+
static int cgx_lmac_enadis_pause_frm(void *cgxd, int lmac_id,
473+
u8 tx_pause, u8 rx_pause)
477474
{
478475
struct cgx *cgx = cgxd;
479476
u64 cfg;
@@ -505,13 +502,11 @@ int cgx_lmac_set_pause_frm(void *cgxd, int lmac_id,
505502
return 0;
506503
}
507504

508-
static void cgx_lmac_pause_frm_config(struct cgx *cgx, int lmac_id, bool enable)
505+
static void cgx_lmac_pause_frm_config(void *cgxd, int lmac_id, bool enable)
509506
{
507+
struct cgx *cgx = cgxd;
510508
u64 cfg;
511509

512-
if (is_dev_rpm(cgx))
513-
return;
514-
515510
if (!is_lmac_valid(cgx, lmac_id))
516511
return;
517512
if (enable) {
@@ -1252,7 +1247,7 @@ static int cgx_lmac_init(struct cgx *cgx)
12521247

12531248
/* Add reference */
12541249
cgx->lmac_idmap[lmac->lmac_id] = lmac;
1255-
cgx_lmac_pause_frm_config(cgx, lmac->lmac_id, true);
1250+
cgx->mac_ops->mac_pause_frm_config(cgx, lmac->lmac_id, true);
12561251
set_bit(lmac->lmac_id, &cgx->lmac_bmap);
12571252
}
12581253

@@ -1281,7 +1276,7 @@ static int cgx_lmac_exit(struct cgx *cgx)
12811276
lmac = cgx->lmac_idmap[i];
12821277
if (!lmac)
12831278
continue;
1284-
cgx_lmac_pause_frm_config(cgx, lmac->lmac_id, false);
1279+
cgx->mac_ops->mac_pause_frm_config(cgx, lmac->lmac_id, false);
12851280
cgx_configure_interrupt(cgx, lmac, lmac->lmac_id, true);
12861281
kfree(lmac->name);
12871282
kfree(lmac);
@@ -1293,7 +1288,7 @@ static int cgx_lmac_exit(struct cgx *cgx)
12931288
static void cgx_populate_features(struct cgx *cgx)
12941289
{
12951290
if (is_dev_rpm(cgx))
1296-
cgx->hw_features = RVU_MAC_RPM;
1291+
cgx->hw_features = (RVU_MAC_RPM | RVU_LMAC_FEAT_FC);
12971292
else
12981293
cgx->hw_features = (RVU_LMAC_FEAT_FC | RVU_LMAC_FEAT_PTP);
12991294
}
@@ -1309,6 +1304,10 @@ static struct mac_ops cgx_mac_ops = {
13091304
.lmac_fwi = CGX_LMAC_FWI,
13101305
.non_contiguous_serdes_lane = false,
13111306
.get_nr_lmacs = cgx_get_nr_lmacs,
1307+
.mac_enadis_rx_pause_fwding = cgx_lmac_enadis_rx_pause_fwding,
1308+
.mac_get_pause_frm_status = cgx_lmac_get_pause_frm_status,
1309+
.mac_enadis_pause_frm = cgx_lmac_enadis_pause_frm,
1310+
.mac_pause_frm_config = cgx_lmac_pause_frm_config,
13121311
};
13131312

13141313
static int cgx_probe(struct pci_dev *pdev, const struct pci_device_id *id)

‎drivers/net/ethernet/marvell/octeontx2/af/lmac_common.h‎

Lines changed: 18 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -67,6 +67,24 @@ struct mac_ops {
6767
* number of setbits in lmac_exist tells number of lmacs
6868
*/
6969
int (*get_nr_lmacs)(void *cgx);
70+
71+
/* Enable LMAC Pause Frame Configuration */
72+
void (*mac_enadis_rx_pause_fwding)(void *cgxd,
73+
int lmac_id,
74+
bool enable);
75+
int (*mac_get_pause_frm_status)(void *cgxd,
76+
int lmac_id,
77+
u8 *tx_pause,
78+
u8 *rx_pause);
79+
80+
int (*mac_enadis_pause_frm)(void *cgxd,
81+
int lmac_id,
82+
u8 tx_pause,
83+
u8 rx_pause);
84+
void (*mac_pause_frm_config)(void *cgxd,
85+
int lmac_id,
86+
bool enable);
87+
7088
};
7189

7290
struct cgx {

‎drivers/net/ethernet/marvell/octeontx2/af/rpm.c‎

Lines changed: 134 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,13 +19,22 @@ static struct mac_ops rpm_mac_ops = {
1919
.lmac_fwi = RPM_LMAC_FWI,
2020
.non_contiguous_serdes_lane = true,
2121
.get_nr_lmacs = rpm_get_nr_lmacs,
22+
.mac_enadis_rx_pause_fwding = rpm_lmac_enadis_rx_pause_fwding,
23+
.mac_get_pause_frm_status = rpm_lmac_get_pause_frm_status,
24+
.mac_enadis_pause_frm = rpm_lmac_enadis_pause_frm,
25+
.mac_pause_frm_config = rpm_lmac_pause_frm_config,
2226
};
2327

2428
struct mac_ops *rpm_get_mac_ops(void)
2529
{
2630
return &rpm_mac_ops;
2731
}
2832

33+
static void rpm_write(rpm_t *rpm, u64 lmac, u64 offset, u64 val)
34+
{
35+
cgx_write(rpm, lmac, offset, val);
36+
}
37+
2938
static u64 rpm_read(rpm_t *rpm, u64 lmac, u64 offset)
3039
{
3140
return cgx_read(rpm, lmac, offset);
@@ -37,3 +46,128 @@ int rpm_get_nr_lmacs(void *rpmd)
3746

3847
return hweight8(rpm_read(rpm, 0, CGXX_CMRX_RX_LMACS) & 0xFULL);
3948
}
49+
50+
void rpm_lmac_enadis_rx_pause_fwding(void *rpmd, int lmac_id, bool enable)
51+
{
52+
struct cgx *rpm = rpmd;
53+
u64 cfg;
54+
55+
if (!rpm)
56+
return;
57+
58+
if (enable) {
59+
cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
60+
cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE;
61+
rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
62+
} else {
63+
cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
64+
cfg |= RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE;
65+
rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
66+
}
67+
}
68+
69+
int rpm_lmac_get_pause_frm_status(void *rpmd, int lmac_id,
70+
u8 *tx_pause, u8 *rx_pause)
71+
{
72+
rpm_t *rpm = rpmd;
73+
u64 cfg;
74+
75+
if (!is_lmac_valid(rpm, lmac_id))
76+
return -ENODEV;
77+
78+
cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
79+
*rx_pause = !(cfg & RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE);
80+
81+
cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
82+
*tx_pause = !(cfg & RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE);
83+
return 0;
84+
}
85+
86+
int rpm_lmac_enadis_pause_frm(void *rpmd, int lmac_id, u8 tx_pause,
87+
u8 rx_pause)
88+
{
89+
rpm_t *rpm = rpmd;
90+
u64 cfg;
91+
92+
if (!is_lmac_valid(rpm, lmac_id))
93+
return -ENODEV;
94+
95+
cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
96+
cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE;
97+
cfg |= rx_pause ? 0x0 : RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE;
98+
cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE;
99+
cfg |= rx_pause ? 0x0 : RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE;
100+
rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
101+
102+
cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
103+
cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE;
104+
cfg |= tx_pause ? 0x0 : RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE;
105+
rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
106+
107+
cfg = rpm_read(rpm, 0, RPMX_CMR_RX_OVR_BP);
108+
if (tx_pause) {
109+
cfg &= ~RPMX_CMR_RX_OVR_BP_EN(lmac_id);
110+
} else {
111+
cfg |= RPMX_CMR_RX_OVR_BP_EN(lmac_id);
112+
cfg &= ~RPMX_CMR_RX_OVR_BP_BP(lmac_id);
113+
}
114+
rpm_write(rpm, 0, RPMX_CMR_RX_OVR_BP, cfg);
115+
return 0;
116+
}
117+
118+
void rpm_lmac_pause_frm_config(void *rpmd, int lmac_id, bool enable)
119+
{
120+
rpm_t *rpm = rpmd;
121+
u64 cfg;
122+
123+
if (enable) {
124+
/* Enable 802.3 pause frame mode */
125+
cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
126+
cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_PFC_MODE;
127+
rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
128+
129+
/* Enable receive pause frames */
130+
cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
131+
cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE;
132+
rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
133+
134+
/* Enable forward pause to TX block */
135+
cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
136+
cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE;
137+
rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
138+
139+
/* Enable pause frames transmission */
140+
cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
141+
cfg &= ~RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE;
142+
rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
143+
144+
/* Set pause time and interval */
145+
cfg = rpm_read(rpm, lmac_id,
146+
RPMX_MTI_MAC100X_CL01_PAUSE_QUANTA);
147+
cfg &= ~0xFFFFULL;
148+
rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_CL01_PAUSE_QUANTA,
149+
cfg | RPM_DEFAULT_PAUSE_TIME);
150+
/* Set pause interval as the hardware default is too short */
151+
cfg = rpm_read(rpm, lmac_id,
152+
RPMX_MTI_MAC100X_CL01_QUANTA_THRESH);
153+
cfg &= ~0xFFFFULL;
154+
rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_CL01_QUANTA_THRESH,
155+
cfg | (RPM_DEFAULT_PAUSE_TIME / 2));
156+
157+
} else {
158+
/* ALL pause frames received are completely ignored */
159+
cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
160+
cfg |= RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE;
161+
rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
162+
163+
/* Disable forward pause to TX block */
164+
cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
165+
cfg |= RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE;
166+
rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
167+
168+
/* Disable pause frames transmission */
169+
cfg = rpm_read(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG);
170+
cfg |= RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE;
171+
rpm_write(rpm, lmac_id, RPMX_MTI_MAC100X_COMMAND_CONFIG, cfg);
172+
}
173+
}

‎drivers/net/ethernet/marvell/octeontx2/af/rpm.h‎

Lines changed: 17 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -21,9 +21,25 @@
2121

2222
#define RPMX_CMRX_LINK_RANGE_MASK GENMASK_ULL(19, 16)
2323
#define RPMX_CMRX_LINK_BASE_MASK GENMASK_ULL(11, 0)
24-
24+
#define RPMX_MTI_MAC100X_COMMAND_CONFIG 0x8010
25+
#define RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE BIT_ULL(29)
26+
#define RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE BIT_ULL(28)
27+
#define RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE BIT_ULL(8)
28+
#define RPMX_MTI_MAC100X_COMMAND_CONFIG_PFC_MODE BIT_ULL(19)
29+
#define RPMX_MTI_MAC100X_CL01_PAUSE_QUANTA 0x80A8
30+
#define RPMX_MTI_MAC100X_CL01_QUANTA_THRESH 0x80C8
31+
#define RPM_DEFAULT_PAUSE_TIME 0xFFFF
32+
#define RPMX_CMR_RX_OVR_BP 0x4120
33+
#define RPMX_CMR_RX_OVR_BP_EN(x) BIT_ULL((x) + 8)
34+
#define RPMX_CMR_RX_OVR_BP_BP(x) BIT_ULL((x) + 4)
2535
#define RPM_LMAC_FWI 0xa
2636

2737
/* Function Declarations */
38+
void rpm_lmac_enadis_rx_pause_fwding(void *rpmd, int lmac_id, bool enable);
39+
int rpm_lmac_get_pause_frm_status(void *cgxd, int lmac_id, u8 *tx_pause,
40+
u8 *rx_pause);
41+
void rpm_lmac_pause_frm_config(void *rpmd, int lmac_id, bool enable);
42+
int rpm_lmac_enadis_pause_frm(void *rpmd, int lmac_id, u8 tx_pause,
43+
u8 rx_pause);
2844
int rpm_get_nr_lmacs(void *cgxd);
2945
#endif /* RPM_H */

‎drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c‎

Lines changed: 13 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -406,6 +406,7 @@ static bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc)
406406

407407
void rvu_cgx_enadis_rx_bp(struct rvu *rvu, int pf, bool enable)
408408
{
409+
struct mac_ops *mac_ops;
409410
u8 cgx_id, lmac_id;
410411
void *cgxd;
411412

@@ -415,11 +416,12 @@ void rvu_cgx_enadis_rx_bp(struct rvu *rvu, int pf, bool enable)
415416
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
416417
cgxd = rvu_cgx_pdata(cgx_id, rvu);
417418

419+
mac_ops = get_mac_ops(cgxd);
418420
/* Set / clear CTL_BCK to control pause frame forwarding to NIX */
419421
if (enable)
420-
cgx_lmac_enadis_rx_pause_fwding(cgxd, lmac_id, true);
422+
mac_ops->mac_enadis_rx_pause_fwding(cgxd, lmac_id, true);
421423
else
422-
cgx_lmac_enadis_rx_pause_fwding(cgxd, lmac_id, false);
424+
mac_ops->mac_enadis_rx_pause_fwding(cgxd, lmac_id, false);
423425
}
424426

425427
int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start)
@@ -731,7 +733,9 @@ int rvu_mbox_handler_cgx_cfg_pause_frm(struct rvu *rvu,
731733
struct cgx_pause_frm_cfg *rsp)
732734
{
733735
int pf = rvu_get_pf(req->hdr.pcifunc);
736+
struct mac_ops *mac_ops;
734737
u8 cgx_id, lmac_id;
738+
void *cgxd;
735739

736740
if (!is_mac_feature_supported(rvu, pf, RVU_LMAC_FEAT_FC))
737741
return 0;
@@ -743,13 +747,16 @@ int rvu_mbox_handler_cgx_cfg_pause_frm(struct rvu *rvu,
743747
return -ENODEV;
744748

745749
rvu_get_cgx_lmac_id(rvu->pf2cgxlmac_map[pf], &cgx_id, &lmac_id);
750+
cgxd = rvu_cgx_pdata(cgx_id, rvu);
751+
mac_ops = get_mac_ops(cgxd);
746752

747753
if (req->set)
748-
cgx_lmac_set_pause_frm(rvu_cgx_pdata(cgx_id, rvu), lmac_id,
749-
req->tx_pause, req->rx_pause);
754+
mac_ops->mac_enadis_pause_frm(cgxd, lmac_id,
755+
req->tx_pause, req->rx_pause);
750756
else
751-
cgx_lmac_get_pause_frm(rvu_cgx_pdata(cgx_id, rvu), lmac_id,
752-
&rsp->tx_pause, &rsp->rx_pause);
757+
mac_ops->mac_get_pause_frm_status(cgxd, lmac_id,
758+
&rsp->tx_pause,
759+
&rsp->rx_pause);
753760
return 0;
754761
}
755762

‎drivers/net/ethernet/marvell/octeontx2/af/rvu_nix.c‎

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -16,6 +16,7 @@
1616
#include "rvu.h"
1717
#include "npc.h"
1818
#include "cgx.h"
19+
#include "lmac_common.h"
1920

2021
static void nix_free_tx_vtag_entries(struct rvu *rvu, u16 pcifunc);
2122
static int rvu_nix_get_bpid(struct rvu *rvu, struct nix_bp_cfg_req *req,
@@ -214,6 +215,7 @@ static bool is_valid_txschq(struct rvu *rvu, int blkaddr,
214215
static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf)
215216
{
216217
struct rvu_pfvf *pfvf = rvu_get_pfvf(rvu, pcifunc);
218+
struct mac_ops *mac_ops;
217219
int pkind, pf, vf, lbkid;
218220
u8 cgx_id, lmac_id;
219221
int err;
@@ -240,10 +242,12 @@ static int nix_interface_init(struct rvu *rvu, u16 pcifunc, int type, int nixlf)
240242
cgx_set_pkind(rvu_cgx_pdata(cgx_id, rvu), lmac_id, pkind);
241243
rvu_npc_set_pkind(rvu, pkind, pfvf);
242244

245+
mac_ops = get_mac_ops(rvu_cgx_pdata(cgx_id, rvu));
243246
/* By default we enable pause frames */
244247
if ((pcifunc & RVU_PFVF_FUNC_MASK) == 0)
245-
cgx_lmac_set_pause_frm(rvu_cgx_pdata(cgx_id, rvu),
246-
lmac_id, true, true);
248+
mac_ops->mac_enadis_pause_frm(rvu_cgx_pdata(cgx_id,
249+
rvu),
250+
lmac_id, true, true);
247251
break;
248252
case NIX_INTF_TYPE_LBK:
249253
vf = (pcifunc & RVU_PFVF_FUNC_MASK) - 1;

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