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TonyXie06rkhuangtao
TonyXie06
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rkhuangtao
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arm64: dts: rockchip: add pinctrl info for RK817&RK809
Change-Id: I23dc0c8271ba8cb566fa16bbd179fe6e8aa3b591 Signed-off-by: Tony Xie <[email protected]>
1 parent 927ae06 commit 1a69527

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4 files changed

+240
-8
lines changed

4 files changed

+240
-8
lines changed

‎arch/arm64/boot/dts/rockchip/px30-evb-ddr3-v10.dts‎

Lines changed: 49 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -319,12 +319,19 @@
319319
reg = <0x20>;
320320
interrupt-parent = <&gpio0>;
321321
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
322-
pinctrl-names = "default";
322+
pinctrl-names = "default", "pmic-sleep",
323+
"pmic-power-off", "pmic-reset";
323324
pinctrl-0 = <&pmic_int>;
325+
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
326+
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
327+
pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
324328
rockchip,system-power-controller;
325329
wakeup-source;
326330
#clock-cells = <1>;
327331
clock-output-names = "rk808-clkout1", "rk808-clkout2";
332+
//fb-inner-reg-idxs = <2>;
333+
/* 1: rst regs (default in codes), 0: rst the pmic */
334+
pmic-reset-func = <0>;
328335

329336
vcc1-supply = <&vcc5v0_sys>;
330337
vcc2-supply = <&vcc5v0_sys>;
@@ -340,6 +347,31 @@
340347
status = "okay";
341348
};
342349

350+
pinctrl_rk8xx: pinctrl_rk8xx {
351+
gpio-controller;
352+
#gpio-cells = <2>;
353+
354+
rk817_slppin_null: rk817_slppin_null {
355+
pins = "gpio_slp";
356+
function = "pin_fun0";
357+
};
358+
359+
rk817_slppin_slp: rk817_slppin_slp {
360+
pins = "gpio_slp";
361+
function = "pin_fun1";
362+
};
363+
364+
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
365+
pins = "gpio_slp";
366+
function = "pin_fun2";
367+
};
368+
369+
rk817_slppin_rst: rk817_slppin_rst {
370+
pins = "gpio_slp";
371+
function = "pin_fun3";
372+
};
373+
};
374+
343375
regulators {
344376
vdd_logic: DCDC_REG1 {
345377
regulator-always-on;
@@ -447,7 +479,7 @@
447479
vccio_sd: LDO_REG5 {
448480
regulator-always-on;
449481
regulator-boot-on;
450-
regulator-min-microvolt = <1800000>;
482+
regulator-min-microvolt = <3300000>;
451483
regulator-max-microvolt = <3300000>;
452484

453485
regulator-name = "vccio_sd";
@@ -615,6 +647,21 @@
615647
rockchip,pins =
616648
<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
617649
};
650+
651+
soc_slppin_gpio: soc_slppin_gpio {
652+
rockchip,pins =
653+
<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
654+
};
655+
656+
soc_slppin_slp: soc_slppin_slp {
657+
rockchip,pins =
658+
<0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
659+
};
660+
661+
soc_slppin_rst: soc_slppin_rst {
662+
rockchip,pins =
663+
<0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
664+
};
618665
};
619666

620667
sdio-pwrseq {

‎arch/arm64/boot/dts/rockchip/px30-evb-ddr4-v10.dts‎

Lines changed: 49 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -319,12 +319,19 @@
319319
reg = <0x20>;
320320
interrupt-parent = <&gpio0>;
321321
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
322-
pinctrl-names = "default";
322+
pinctrl-names = "default", "pmic-sleep",
323+
"pmic-power-off", "pmic-reset";
323324
pinctrl-0 = <&pmic_int>;
325+
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
326+
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
327+
pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
324328
rockchip,system-power-controller;
325329
wakeup-source;
326330
#clock-cells = <1>;
327331
clock-output-names = "rk808-clkout1", "rk808-clkout2";
332+
//fb-inner-reg-idxs = <2>;
333+
/* 1: rst regs (default in codes), 0: rst the pmic */
334+
pmic-reset-func = <0>;
328335

329336
vcc1-supply = <&vcc5v0_sys>;
330337
vcc2-supply = <&vcc5v0_sys>;
@@ -340,6 +347,31 @@
340347
status = "okay";
341348
};
342349

350+
pinctrl_rk8xx: pinctrl_rk8xx {
351+
gpio-controller;
352+
#gpio-cells = <2>;
353+
354+
rk817_slppin_null: rk817_slppin_null {
355+
pins = "gpio_slp";
356+
function = "pin_fun0";
357+
};
358+
359+
rk817_slppin_slp: rk817_slppin_slp {
360+
pins = "gpio_slp";
361+
function = "pin_fun1";
362+
};
363+
364+
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
365+
pins = "gpio_slp";
366+
function = "pin_fun2";
367+
};
368+
369+
rk817_slppin_rst: rk817_slppin_rst {
370+
pins = "gpio_slp";
371+
function = "pin_fun3";
372+
};
373+
};
374+
343375
regulators {
344376
vdd_logic: DCDC_REG1 {
345377
regulator-always-on;
@@ -448,7 +480,7 @@
448480
vccio_sd: LDO_REG5 {
449481
regulator-always-on;
450482
regulator-boot-on;
451-
regulator-min-microvolt = <1800000>;
483+
regulator-min-microvolt = <3300000>;
452484
regulator-max-microvolt = <3300000>;
453485

454486
regulator-name = "vccio_sd";
@@ -615,6 +647,21 @@
615647
rockchip,pins =
616648
<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
617649
};
650+
651+
soc_slppin_gpio: soc_slppin_gpio {
652+
rockchip,pins =
653+
<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
654+
};
655+
656+
soc_slppin_slp: soc_slppin_slp {
657+
rockchip,pins =
658+
<0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
659+
};
660+
661+
soc_slppin_rst: soc_slppin_rst {
662+
rockchip,pins =
663+
<0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
664+
};
618665
};
619666

620667
sdio-pwrseq {

‎arch/arm64/boot/dts/rockchip/rk3326-863-lp3-v10.dts‎

Lines changed: 71 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -273,12 +273,19 @@
273273
reg = <0x20>;
274274
interrupt-parent = <&gpio0>;
275275
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
276-
pinctrl-names = "default";
276+
pinctrl-names = "default", "pmic-sleep",
277+
"pmic-power-off", "pmic-reset";
277278
pinctrl-0 = <&pmic_int>;
279+
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
280+
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
281+
pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
278282
rockchip,system-power-controller;
279283
wakeup-source;
280284
#clock-cells = <1>;
281285
clock-output-names = "rk808-clkout1", "rk808-clkout2";
286+
//fb-inner-reg-idxs = <2>;
287+
/* 1: rst regs (default in codes), 0: rst the pmic */
288+
pmic-reset-func = <0>;
282289

283290
vcc1-supply = <&vccsys>;
284291
vcc2-supply = <&vccsys>;
@@ -294,6 +301,53 @@
294301
status = "okay";
295302
};
296303

304+
pinctrl_rk8xx: pinctrl_rk8xx {
305+
gpio-controller;
306+
#gpio-cells = <2>;
307+
308+
rk817_ts_gpio1: rk817_ts_gpio1 {
309+
pins = "gpio_ts";
310+
function = "pin_fun1";
311+
/* output-low; */
312+
/* input-enable; */
313+
};
314+
315+
rk817_gt_gpio2: rk817_gt_gpio2 {
316+
pins = "gpio_gt";
317+
function = "pin_fun1";
318+
};
319+
320+
rk817_pin_ts: rk817_pin_ts {
321+
pins = "gpio_ts";
322+
function = "pin_fun0";
323+
};
324+
325+
rk817_pin_gt: rk817_pin_gt {
326+
pins = "gpio_gt";
327+
function = "pin_fun0";
328+
};
329+
330+
rk817_slppin_null: rk817_slppin_null {
331+
pins = "gpio_slp";
332+
function = "pin_fun0";
333+
};
334+
335+
rk817_slppin_slp: rk817_slppin_slp {
336+
pins = "gpio_slp";
337+
function = "pin_fun1";
338+
};
339+
340+
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
341+
pins = "gpio_slp";
342+
function = "pin_fun2";
343+
};
344+
345+
rk817_slppin_rst: rk817_slppin_rst {
346+
pins = "gpio_slp";
347+
function = "pin_fun3";
348+
};
349+
};
350+
297351
regulators {
298352
vdd_logic: DCDC_REG1 {
299353
regulator-always-on;
@@ -401,7 +455,7 @@
401455
vccio_sd: LDO_REG5 {
402456
regulator-always-on;
403457
regulator-boot-on;
404-
regulator-min-microvolt = <1800000>;
458+
regulator-min-microvolt = <3300000>;
405459
regulator-max-microvolt = <3300000>;
406460

407461
regulator-name = "vccio_sd";
@@ -583,6 +637,21 @@
583637
rockchip,pins =
584638
<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
585639
};
640+
641+
soc_slppin_gpio: soc_slppin_gpio {
642+
rockchip,pins =
643+
<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
644+
};
645+
646+
soc_slppin_slp: soc_slppin_slp {
647+
rockchip,pins =
648+
<0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
649+
};
650+
651+
soc_slppin_rst: soc_slppin_rst {
652+
rockchip,pins =
653+
<0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
654+
};
586655
};
587656

588657
sdio-pwrseq {

‎arch/arm64/boot/dts/rockchip/rk3326-evb-lp3-v10.dts‎

Lines changed: 71 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -345,12 +345,19 @@
345345
reg = <0x20>;
346346
interrupt-parent = <&gpio0>;
347347
interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
348-
pinctrl-names = "default";
348+
pinctrl-names = "default", "pmic-sleep",
349+
"pmic-power-off", "pmic-reset";
349350
pinctrl-0 = <&pmic_int>;
351+
pinctrl-1 = <&soc_slppin_slp>, <&rk817_slppin_slp>;
352+
pinctrl-2 = <&soc_slppin_gpio>, <&rk817_slppin_pwrdn>;
353+
pinctrl-3 = <&soc_slppin_rst>, <&rk817_slppin_rst>;
350354
rockchip,system-power-controller;
351355
wakeup-source;
352356
#clock-cells = <1>;
353357
clock-output-names = "rk808-clkout1", "rk808-clkout2";
358+
//fb-inner-reg-idxs = <2>;
359+
/* 1: rst regs (default in codes), 0: rst the pmic */
360+
pmic-reset-func = <0>;
354361

355362
vcc1-supply = <&vccsys>;
356363
vcc2-supply = <&vccsys>;
@@ -366,6 +373,53 @@
366373
status = "okay";
367374
};
368375

376+
pinctrl_rk8xx: pinctrl_rk8xx {
377+
gpio-controller;
378+
#gpio-cells = <2>;
379+
380+
rk817_ts_gpio1: rk817_ts_gpio1 {
381+
pins = "gpio_ts";
382+
function = "pin_fun1";
383+
/* output-low; */
384+
/* input-enable; */
385+
};
386+
387+
rk817_gt_gpio2: rk817_gt_gpio2 {
388+
pins = "gpio_gt";
389+
function = "pin_fun1";
390+
};
391+
392+
rk817_pin_ts: rk817_pin_ts {
393+
pins = "gpio_ts";
394+
function = "pin_fun0";
395+
};
396+
397+
rk817_pin_gt: rk817_pin_gt {
398+
pins = "gpio_gt";
399+
function = "pin_fun0";
400+
};
401+
402+
rk817_slppin_null: rk817_slppin_null {
403+
pins = "gpio_slp";
404+
function = "pin_fun0";
405+
};
406+
407+
rk817_slppin_slp: rk817_slppin_slp {
408+
pins = "gpio_slp";
409+
function = "pin_fun1";
410+
};
411+
412+
rk817_slppin_pwrdn: rk817_slppin_pwrdn {
413+
pins = "gpio_slp";
414+
function = "pin_fun2";
415+
};
416+
417+
rk817_slppin_rst: rk817_slppin_rst {
418+
pins = "gpio_slp";
419+
function = "pin_fun3";
420+
};
421+
};
422+
369423
regulators {
370424
vdd_logic: DCDC_REG1 {
371425
regulator-always-on;
@@ -473,7 +527,7 @@
473527
vccio_sd: LDO_REG5 {
474528
regulator-always-on;
475529
regulator-boot-on;
476-
regulator-min-microvolt = <1800000>;
530+
regulator-min-microvolt = <3300000>;
477531
regulator-max-microvolt = <3300000>;
478532

479533
regulator-name = "vccio_sd";
@@ -692,6 +746,21 @@
692746
rockchip,pins =
693747
<0 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
694748
};
749+
750+
soc_slppin_gpio: soc_slppin_gpio {
751+
rockchip,pins =
752+
<0 RK_PA4 RK_FUNC_GPIO &pcfg_output_low>;
753+
};
754+
755+
soc_slppin_slp: soc_slppin_slp {
756+
rockchip,pins =
757+
<0 RK_PA4 RK_FUNC_1 &pcfg_pull_none>;
758+
};
759+
760+
soc_slppin_rst: soc_slppin_rst {
761+
rockchip,pins =
762+
<0 RK_PA4 RK_FUNC_2 &pcfg_pull_none>;
763+
};
695764
};
696765

697766
sdio-pwrseq {

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