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spandruvadalenb
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tools/power turbostat: Fix CPU%C1 display value
In some case C1% will be wrong value, when platform doesn't have MSR for C1 residency. For example: Core CPU CPU%c1 - - 100.00 0 0 100.00 0 2 100.00 1 1 100.00 1 3 100.00 But adding Busy% will fix this Core CPU Busy% CPU%c1 - - 99.77 0.23 0 0 99.77 0.23 0 2 99.77 0.23 1 1 99.77 0.23 1 3 99.77 0.23 This issue can be reproduced on most of the recent systems including Broadwell, Skylake and later. This is because if we don't select Busy% or Avg_MHz or Bzy_MHz then mperf value will not be read from MSR, so it will be 0. But this is required for C1% calculation when MSR for C1 residency is not present. Same is true for C3, C6 and C7 column selection. So add another define DO_BIC_READ(), which doesn't depend on user column selection and use for mperf, C3, C6 and C7 related counters. So when there is no platform support for C1 residency counters, we still read these counters, if the CPU has support and user selected display of CPU%c1. Signed-off-by: Srinivas Pandruvada <[email protected]> Signed-off-by: Len Brown <[email protected]>
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tools/power/x86/turbostat/turbostat.c

Lines changed: 17 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -507,6 +507,7 @@ unsigned long long bic_enabled = (0xFFFFFFFFFFFFFFFFULL & ~BIC_DISABLED_BY_DEFAU
507507
unsigned long long bic_present = BIC_USEC | BIC_TOD | BIC_sysfs | BIC_APIC | BIC_X2APIC;
508508

509509
#define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
510+
#define DO_BIC_READ(COUNTER_NAME) (bic_present & COUNTER_NAME)
510511
#define ENABLE_BIC(COUNTER_NAME) (bic_enabled |= COUNTER_NAME)
511512
#define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
512513
#define BIC_NOT_PRESENT(COUNTER_BIT) (bic_present &= ~COUNTER_BIT)
@@ -1287,6 +1288,14 @@ delta_core(struct core_data *new, struct core_data *old)
12871288
}
12881289
}
12891290

1291+
int soft_c1_residency_display(int bic)
1292+
{
1293+
if (!DO_BIC(BIC_CPU_c1) || use_c1_residency_msr)
1294+
return 0;
1295+
1296+
return DO_BIC_READ(bic);
1297+
}
1298+
12901299
/*
12911300
* old = new - old
12921301
*/
@@ -1323,7 +1332,8 @@ delta_thread(struct thread_data *new, struct thread_data *old,
13231332

13241333
old->c1 = new->c1 - old->c1;
13251334

1326-
if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
1335+
if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) ||
1336+
soft_c1_residency_display(BIC_Avg_MHz)) {
13271337
if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
13281338
old->aperf = new->aperf - old->aperf;
13291339
old->mperf = new->mperf - old->mperf;
@@ -1780,7 +1790,8 @@ int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
17801790
retry:
17811791
t->tsc = rdtsc(); /* we are running on local CPU of interest */
17821792

1783-
if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
1793+
if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz) ||
1794+
soft_c1_residency_display(BIC_Avg_MHz)) {
17841795
unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
17851796

17861797
/*
@@ -1857,20 +1868,20 @@ int get_counters(struct thread_data *t, struct core_data *c, struct pkg_data *p)
18571868
if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
18581869
goto done;
18591870

1860-
if (DO_BIC(BIC_CPU_c3)) {
1871+
if (DO_BIC(BIC_CPU_c3) || soft_c1_residency_display(BIC_CPU_c3)) {
18611872
if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
18621873
return -6;
18631874
}
18641875

1865-
if (DO_BIC(BIC_CPU_c6) && !do_knl_cstates) {
1876+
if ((DO_BIC(BIC_CPU_c6) || soft_c1_residency_display(BIC_CPU_c6)) && !do_knl_cstates) {
18661877
if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
18671878
return -7;
1868-
} else if (do_knl_cstates) {
1879+
} else if (do_knl_cstates || soft_c1_residency_display(BIC_CPU_c6)) {
18691880
if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
18701881
return -7;
18711882
}
18721883

1873-
if (DO_BIC(BIC_CPU_c7))
1884+
if (DO_BIC(BIC_CPU_c7) || soft_c1_residency_display(BIC_CPU_c7))
18741885
if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
18751886
return -8;
18761887

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