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finley1226rkhuangtao
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clk: rockchip: rk3399: Fix clk_cifout and clk_cifout_src
Change-Id: I1480615b8f8cfaab2b318e6b8438ead2232a238d Signed-off-by: Finley Xiao <[email protected]>
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drivers/clk/rockchip/clk-rk3399.c

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -1361,12 +1361,12 @@ static struct rockchip_clk_branch rk3399_clk_branches[] __initdata = {
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RK3399_CLKGATE_CON(27), 6, GFLAGS),
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/* cif */
1364-
COMPOSITE_NODIV(0, "clk_cifout_src", mux_pll_src_cpll_gpll_npll_p, 0,
1365-
RK3399_CLKSEL_CON(56), 6, 2, MFLAGS,
1364+
COMPOSITE(0, "clk_cifout_src", mux_pll_src_cpll_gpll_npll_p, 0,
1365+
RK3399_CLKSEL_CON(56), 6, 2, MFLAGS, 0, 5, DFLAGS,
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RK3399_CLKGATE_CON(10), 7, GFLAGS),
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1368-
COMPOSITE_NOGATE(SCLK_CIF_OUT, "clk_cifout", mux_clk_cif_p, 0,
1369-
RK3399_CLKSEL_CON(56), 5, 1, MFLAGS, 0, 5, DFLAGS),
1368+
MUX(SCLK_CIF_OUT, "clk_cifout", mux_clk_cif_p, CLK_SET_RATE_PARENT,
1369+
RK3399_CLKSEL_CON(56), 5, 1, MFLAGS),
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/* gic */
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COMPOSITE(ACLK_GIC_PRE, "aclk_gic_pre", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,

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