Skip to content

Commit b3712fa

Browse files
IronShendavem330
authored andcommitted
net: hns3: split out hclge_dbg_dump_qos_buf_cfg()
hclge_dbg_dump_qos_buf_cfg() is bloated, so split it into separate functions for readability and maintainability. Signed-off-by: Jian Shen <[email protected]> Signed-off-by: Huazhong Tan <[email protected]> Signed-off-by: David S. Miller <[email protected]>
1 parent 73f7767 commit b3712fa

File tree

1 file changed

+115
-43
lines changed

1 file changed

+115
-43
lines changed

drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_debugfs.c

Lines changed: 115 additions & 43 deletions
Original file line numberDiff line numberDiff line change
@@ -984,83 +984,101 @@ static void hclge_dbg_dump_qos_pri_map(struct hclge_dev *hdev)
984984
dev_info(&hdev->pdev->dev, "pri_7_to_tc: 0x%x\n", pri_map->pri7_tc);
985985
}
986986

987-
static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev)
987+
static int hclge_dbg_dump_tx_buf_cfg(struct hclge_dev *hdev)
988988
{
989989
struct hclge_tx_buff_alloc_cmd *tx_buf_cmd;
990-
struct hclge_rx_priv_buff_cmd *rx_buf_cmd;
991-
struct hclge_rx_priv_wl_buf *rx_priv_wl;
992-
struct hclge_rx_com_wl *rx_packet_cnt;
993-
struct hclge_rx_com_thrd *rx_com_thrd;
994-
struct hclge_rx_com_wl *rx_com_wl;
995-
enum hclge_opcode_type cmd;
996-
struct hclge_desc desc[2];
990+
struct hclge_desc desc;
997991
int i, ret;
998992

999-
cmd = HCLGE_OPC_TX_BUFF_ALLOC;
1000-
hclge_cmd_setup_basic_desc(desc, cmd, true);
1001-
ret = hclge_cmd_send(&hdev->hw, desc, 1);
993+
hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_TX_BUFF_ALLOC, true);
994+
ret = hclge_cmd_send(&hdev->hw, &desc, 1);
1002995
if (ret)
1003-
goto err_qos_cmd_send;
996+
return ret;
1004997

1005998
dev_info(&hdev->pdev->dev, "dump qos buf cfg\n");
1006-
1007-
tx_buf_cmd = (struct hclge_tx_buff_alloc_cmd *)desc[0].data;
999+
tx_buf_cmd = (struct hclge_tx_buff_alloc_cmd *)desc.data;
10081000
for (i = 0; i < HCLGE_MAX_TC_NUM; i++)
10091001
dev_info(&hdev->pdev->dev, "tx_packet_buf_tc_%d: 0x%x\n", i,
10101002
le16_to_cpu(tx_buf_cmd->tx_pkt_buff[i]));
10111003

1012-
cmd = HCLGE_OPC_RX_PRIV_BUFF_ALLOC;
1013-
hclge_cmd_setup_basic_desc(desc, cmd, true);
1014-
ret = hclge_cmd_send(&hdev->hw, desc, 1);
1004+
return 0;
1005+
}
1006+
1007+
static int hclge_dbg_dump_rx_priv_buf_cfg(struct hclge_dev *hdev)
1008+
{
1009+
struct hclge_rx_priv_buff_cmd *rx_buf_cmd;
1010+
struct hclge_desc desc;
1011+
int i, ret;
1012+
1013+
hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_PRIV_BUFF_ALLOC, true);
1014+
ret = hclge_cmd_send(&hdev->hw, &desc, 1);
10151015
if (ret)
1016-
goto err_qos_cmd_send;
1016+
return ret;
10171017

10181018
dev_info(&hdev->pdev->dev, "\n");
1019-
rx_buf_cmd = (struct hclge_rx_priv_buff_cmd *)desc[0].data;
1019+
rx_buf_cmd = (struct hclge_rx_priv_buff_cmd *)desc.data;
10201020
for (i = 0; i < HCLGE_MAX_TC_NUM; i++)
10211021
dev_info(&hdev->pdev->dev, "rx_packet_buf_tc_%d: 0x%x\n", i,
10221022
le16_to_cpu(rx_buf_cmd->buf_num[i]));
10231023

10241024
dev_info(&hdev->pdev->dev, "rx_share_buf: 0x%x\n",
10251025
le16_to_cpu(rx_buf_cmd->shared_buf));
10261026

1027-
cmd = HCLGE_OPC_RX_COM_WL_ALLOC;
1028-
hclge_cmd_setup_basic_desc(desc, cmd, true);
1029-
ret = hclge_cmd_send(&hdev->hw, desc, 1);
1027+
return 0;
1028+
}
1029+
1030+
static int hclge_dbg_dump_rx_common_wl_cfg(struct hclge_dev *hdev)
1031+
{
1032+
struct hclge_rx_com_wl *rx_com_wl;
1033+
struct hclge_desc desc;
1034+
int ret;
1035+
1036+
hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_COM_WL_ALLOC, true);
1037+
ret = hclge_cmd_send(&hdev->hw, &desc, 1);
10301038
if (ret)
1031-
goto err_qos_cmd_send;
1039+
return ret;
10321040

1033-
rx_com_wl = (struct hclge_rx_com_wl *)desc[0].data;
1041+
rx_com_wl = (struct hclge_rx_com_wl *)desc.data;
10341042
dev_info(&hdev->pdev->dev, "\n");
10351043
dev_info(&hdev->pdev->dev, "rx_com_wl: high: 0x%x, low: 0x%x\n",
10361044
le16_to_cpu(rx_com_wl->com_wl.high),
10371045
le16_to_cpu(rx_com_wl->com_wl.low));
10381046

1039-
cmd = HCLGE_OPC_RX_GBL_PKT_CNT;
1040-
hclge_cmd_setup_basic_desc(desc, cmd, true);
1041-
ret = hclge_cmd_send(&hdev->hw, desc, 1);
1047+
return 0;
1048+
}
1049+
1050+
static int hclge_dbg_dump_rx_global_pkt_cnt(struct hclge_dev *hdev)
1051+
{
1052+
struct hclge_rx_com_wl *rx_packet_cnt;
1053+
struct hclge_desc desc;
1054+
int ret;
1055+
1056+
hclge_cmd_setup_basic_desc(&desc, HCLGE_OPC_RX_GBL_PKT_CNT, true);
1057+
ret = hclge_cmd_send(&hdev->hw, &desc, 1);
10421058
if (ret)
1043-
goto err_qos_cmd_send;
1059+
return ret;
10441060

1045-
rx_packet_cnt = (struct hclge_rx_com_wl *)desc[0].data;
1061+
rx_packet_cnt = (struct hclge_rx_com_wl *)desc.data;
10461062
dev_info(&hdev->pdev->dev,
10471063
"rx_global_packet_cnt: high: 0x%x, low: 0x%x\n",
10481064
le16_to_cpu(rx_packet_cnt->com_wl.high),
10491065
le16_to_cpu(rx_packet_cnt->com_wl.low));
1050-
dev_info(&hdev->pdev->dev, "\n");
10511066

1052-
if (!hnae3_dev_dcb_supported(hdev)) {
1053-
dev_info(&hdev->pdev->dev,
1054-
"Only DCB-supported dev supports rx priv wl\n");
1055-
return;
1056-
}
1057-
cmd = HCLGE_OPC_RX_PRIV_WL_ALLOC;
1058-
hclge_cmd_setup_basic_desc(&desc[0], cmd, true);
1067+
return 0;
1068+
}
1069+
1070+
static int hclge_dbg_dump_rx_priv_wl_buf_cfg(struct hclge_dev *hdev)
1071+
{
1072+
struct hclge_rx_priv_wl_buf *rx_priv_wl;
1073+
struct hclge_desc desc[2];
1074+
int i, ret;
1075+
1076+
hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_RX_PRIV_WL_ALLOC, true);
10591077
desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
1060-
hclge_cmd_setup_basic_desc(&desc[1], cmd, true);
1078+
hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_RX_PRIV_WL_ALLOC, true);
10611079
ret = hclge_cmd_send(&hdev->hw, desc, 2);
10621080
if (ret)
1063-
goto err_qos_cmd_send;
1081+
return ret;
10641082

10651083
rx_priv_wl = (struct hclge_rx_priv_wl_buf *)desc[0].data;
10661084
for (i = 0; i < HCLGE_TC_NUM_ONE_DESC; i++)
@@ -1077,13 +1095,21 @@ static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev)
10771095
le16_to_cpu(rx_priv_wl->tc_wl[i].high),
10781096
le16_to_cpu(rx_priv_wl->tc_wl[i].low));
10791097

1080-
cmd = HCLGE_OPC_RX_COM_THRD_ALLOC;
1081-
hclge_cmd_setup_basic_desc(&desc[0], cmd, true);
1098+
return 0;
1099+
}
1100+
1101+
static int hclge_dbg_dump_rx_common_threshold_cfg(struct hclge_dev *hdev)
1102+
{
1103+
struct hclge_rx_com_thrd *rx_com_thrd;
1104+
struct hclge_desc desc[2];
1105+
int i, ret;
1106+
1107+
hclge_cmd_setup_basic_desc(&desc[0], HCLGE_OPC_RX_COM_THRD_ALLOC, true);
10821108
desc[0].flag |= cpu_to_le16(HCLGE_CMD_FLAG_NEXT);
1083-
hclge_cmd_setup_basic_desc(&desc[1], cmd, true);
1109+
hclge_cmd_setup_basic_desc(&desc[1], HCLGE_OPC_RX_COM_THRD_ALLOC, true);
10841110
ret = hclge_cmd_send(&hdev->hw, desc, 2);
10851111
if (ret)
1086-
goto err_qos_cmd_send;
1112+
return ret;
10871113

10881114
dev_info(&hdev->pdev->dev, "\n");
10891115
rx_com_thrd = (struct hclge_rx_com_thrd *)desc[0].data;
@@ -1100,6 +1126,52 @@ static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev)
11001126
i + HCLGE_TC_NUM_ONE_DESC,
11011127
le16_to_cpu(rx_com_thrd->com_thrd[i].high),
11021128
le16_to_cpu(rx_com_thrd->com_thrd[i].low));
1129+
1130+
return 0;
1131+
}
1132+
1133+
static void hclge_dbg_dump_qos_buf_cfg(struct hclge_dev *hdev)
1134+
{
1135+
enum hclge_opcode_type cmd;
1136+
int ret;
1137+
1138+
cmd = HCLGE_OPC_TX_BUFF_ALLOC;
1139+
ret = hclge_dbg_dump_tx_buf_cfg(hdev);
1140+
if (ret)
1141+
goto err_qos_cmd_send;
1142+
1143+
cmd = HCLGE_OPC_RX_PRIV_BUFF_ALLOC;
1144+
ret = hclge_dbg_dump_rx_priv_buf_cfg(hdev);
1145+
if (ret)
1146+
goto err_qos_cmd_send;
1147+
1148+
cmd = HCLGE_OPC_RX_COM_WL_ALLOC;
1149+
ret = hclge_dbg_dump_rx_common_wl_cfg(hdev);
1150+
if (ret)
1151+
goto err_qos_cmd_send;
1152+
1153+
cmd = HCLGE_OPC_RX_GBL_PKT_CNT;
1154+
ret = hclge_dbg_dump_rx_global_pkt_cnt(hdev);
1155+
if (ret)
1156+
goto err_qos_cmd_send;
1157+
1158+
dev_info(&hdev->pdev->dev, "\n");
1159+
if (!hnae3_dev_dcb_supported(hdev)) {
1160+
dev_info(&hdev->pdev->dev,
1161+
"Only DCB-supported dev supports rx priv wl\n");
1162+
return;
1163+
}
1164+
1165+
cmd = HCLGE_OPC_RX_PRIV_WL_ALLOC;
1166+
ret = hclge_dbg_dump_rx_priv_wl_buf_cfg(hdev);
1167+
if (ret)
1168+
goto err_qos_cmd_send;
1169+
1170+
cmd = HCLGE_OPC_RX_COM_THRD_ALLOC;
1171+
ret = hclge_dbg_dump_rx_common_threshold_cfg(hdev);
1172+
if (ret)
1173+
goto err_qos_cmd_send;
1174+
11031175
return;
11041176

11051177
err_qos_cmd_send:

0 commit comments

Comments
 (0)