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ecree-solarflaredavem330
ecree-solarflare
authored and
davem330
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sfc_ef100: statistics gathering
MAC stats work much the same as on EF10, with a periodic DMA to a region specified via an MCDI. Signed-off-by: Edward Cree <[email protected]> Signed-off-by: David S. Miller <[email protected]>
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‎drivers/net/ethernet/sfc/ef100_netdev.c‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -86,6 +86,7 @@ static int ef100_net_stop(struct net_device *net_dev)
8686

8787
netif_stop_queue(net_dev);
8888
efx_stop_all(efx);
89+
efx_mcdi_mac_fini_stats(efx);
8990
efx_disable_interrupts(efx);
9091
efx_clear_interrupt_affinity(efx);
9192
efx_nic_fini_interrupt(efx);
@@ -157,6 +158,10 @@ static int ef100_net_open(struct net_device *net_dev)
157158
*/
158159
(void) efx_mcdi_poll_reboot(efx);
159160

161+
rc = efx_mcdi_mac_init_stats(efx);
162+
if (rc)
163+
goto fail;
164+
160165
efx_start_all(efx);
161166

162167
/* Link state detection is normally event-driven; we have
@@ -212,6 +217,7 @@ static const struct net_device_ops ef100_netdev_ops = {
212217
.ndo_open = ef100_net_open,
213218
.ndo_stop = ef100_net_stop,
214219
.ndo_start_xmit = ef100_hard_start_xmit,
220+
.ndo_get_stats64 = efx_net_stats,
215221
.ndo_validate_addr = eth_validate_addr,
216222
.ndo_set_rx_mode = efx_set_rx_mode, /* Lookout */
217223
.ndo_get_phys_port_id = efx_get_phys_port_id,

‎drivers/net/ethernet/sfc/ef100_nic.c‎

Lines changed: 170 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -453,6 +453,171 @@ static int ef100_reset(struct efx_nic *efx, enum reset_type reset_type)
453453
return rc;
454454
}
455455

456+
static void ef100_common_stat_mask(unsigned long *mask)
457+
{
458+
__set_bit(EF100_STAT_port_rx_packets, mask);
459+
__set_bit(EF100_STAT_port_tx_packets, mask);
460+
__set_bit(EF100_STAT_port_rx_bytes, mask);
461+
__set_bit(EF100_STAT_port_tx_bytes, mask);
462+
__set_bit(EF100_STAT_port_rx_multicast, mask);
463+
__set_bit(EF100_STAT_port_rx_bad, mask);
464+
__set_bit(EF100_STAT_port_rx_align_error, mask);
465+
__set_bit(EF100_STAT_port_rx_overflow, mask);
466+
}
467+
468+
static void ef100_ethtool_stat_mask(unsigned long *mask)
469+
{
470+
__set_bit(EF100_STAT_port_tx_pause, mask);
471+
__set_bit(EF100_STAT_port_tx_unicast, mask);
472+
__set_bit(EF100_STAT_port_tx_multicast, mask);
473+
__set_bit(EF100_STAT_port_tx_broadcast, mask);
474+
__set_bit(EF100_STAT_port_tx_lt64, mask);
475+
__set_bit(EF100_STAT_port_tx_64, mask);
476+
__set_bit(EF100_STAT_port_tx_65_to_127, mask);
477+
__set_bit(EF100_STAT_port_tx_128_to_255, mask);
478+
__set_bit(EF100_STAT_port_tx_256_to_511, mask);
479+
__set_bit(EF100_STAT_port_tx_512_to_1023, mask);
480+
__set_bit(EF100_STAT_port_tx_1024_to_15xx, mask);
481+
__set_bit(EF100_STAT_port_tx_15xx_to_jumbo, mask);
482+
__set_bit(EF100_STAT_port_rx_good, mask);
483+
__set_bit(EF100_STAT_port_rx_pause, mask);
484+
__set_bit(EF100_STAT_port_rx_unicast, mask);
485+
__set_bit(EF100_STAT_port_rx_broadcast, mask);
486+
__set_bit(EF100_STAT_port_rx_lt64, mask);
487+
__set_bit(EF100_STAT_port_rx_64, mask);
488+
__set_bit(EF100_STAT_port_rx_65_to_127, mask);
489+
__set_bit(EF100_STAT_port_rx_128_to_255, mask);
490+
__set_bit(EF100_STAT_port_rx_256_to_511, mask);
491+
__set_bit(EF100_STAT_port_rx_512_to_1023, mask);
492+
__set_bit(EF100_STAT_port_rx_1024_to_15xx, mask);
493+
__set_bit(EF100_STAT_port_rx_15xx_to_jumbo, mask);
494+
__set_bit(EF100_STAT_port_rx_gtjumbo, mask);
495+
__set_bit(EF100_STAT_port_rx_bad_gtjumbo, mask);
496+
__set_bit(EF100_STAT_port_rx_length_error, mask);
497+
__set_bit(EF100_STAT_port_rx_nodesc_drops, mask);
498+
__set_bit(GENERIC_STAT_rx_nodesc_trunc, mask);
499+
__set_bit(GENERIC_STAT_rx_noskb_drops, mask);
500+
}
501+
502+
#define EF100_DMA_STAT(ext_name, mcdi_name) \
503+
[EF100_STAT_ ## ext_name] = \
504+
{ #ext_name, 64, 8 * MC_CMD_MAC_ ## mcdi_name }
505+
506+
static const struct efx_hw_stat_desc ef100_stat_desc[EF100_STAT_COUNT] = {
507+
EF100_DMA_STAT(port_tx_bytes, TX_BYTES),
508+
EF100_DMA_STAT(port_tx_packets, TX_PKTS),
509+
EF100_DMA_STAT(port_tx_pause, TX_PAUSE_PKTS),
510+
EF100_DMA_STAT(port_tx_unicast, TX_UNICAST_PKTS),
511+
EF100_DMA_STAT(port_tx_multicast, TX_MULTICAST_PKTS),
512+
EF100_DMA_STAT(port_tx_broadcast, TX_BROADCAST_PKTS),
513+
EF100_DMA_STAT(port_tx_lt64, TX_LT64_PKTS),
514+
EF100_DMA_STAT(port_tx_64, TX_64_PKTS),
515+
EF100_DMA_STAT(port_tx_65_to_127, TX_65_TO_127_PKTS),
516+
EF100_DMA_STAT(port_tx_128_to_255, TX_128_TO_255_PKTS),
517+
EF100_DMA_STAT(port_tx_256_to_511, TX_256_TO_511_PKTS),
518+
EF100_DMA_STAT(port_tx_512_to_1023, TX_512_TO_1023_PKTS),
519+
EF100_DMA_STAT(port_tx_1024_to_15xx, TX_1024_TO_15XX_PKTS),
520+
EF100_DMA_STAT(port_tx_15xx_to_jumbo, TX_15XX_TO_JUMBO_PKTS),
521+
EF100_DMA_STAT(port_rx_bytes, RX_BYTES),
522+
EF100_DMA_STAT(port_rx_packets, RX_PKTS),
523+
EF100_DMA_STAT(port_rx_good, RX_GOOD_PKTS),
524+
EF100_DMA_STAT(port_rx_bad, RX_BAD_FCS_PKTS),
525+
EF100_DMA_STAT(port_rx_pause, RX_PAUSE_PKTS),
526+
EF100_DMA_STAT(port_rx_unicast, RX_UNICAST_PKTS),
527+
EF100_DMA_STAT(port_rx_multicast, RX_MULTICAST_PKTS),
528+
EF100_DMA_STAT(port_rx_broadcast, RX_BROADCAST_PKTS),
529+
EF100_DMA_STAT(port_rx_lt64, RX_UNDERSIZE_PKTS),
530+
EF100_DMA_STAT(port_rx_64, RX_64_PKTS),
531+
EF100_DMA_STAT(port_rx_65_to_127, RX_65_TO_127_PKTS),
532+
EF100_DMA_STAT(port_rx_128_to_255, RX_128_TO_255_PKTS),
533+
EF100_DMA_STAT(port_rx_256_to_511, RX_256_TO_511_PKTS),
534+
EF100_DMA_STAT(port_rx_512_to_1023, RX_512_TO_1023_PKTS),
535+
EF100_DMA_STAT(port_rx_1024_to_15xx, RX_1024_TO_15XX_PKTS),
536+
EF100_DMA_STAT(port_rx_15xx_to_jumbo, RX_15XX_TO_JUMBO_PKTS),
537+
EF100_DMA_STAT(port_rx_gtjumbo, RX_GTJUMBO_PKTS),
538+
EF100_DMA_STAT(port_rx_bad_gtjumbo, RX_JABBER_PKTS),
539+
EF100_DMA_STAT(port_rx_align_error, RX_ALIGN_ERROR_PKTS),
540+
EF100_DMA_STAT(port_rx_length_error, RX_LENGTH_ERROR_PKTS),
541+
EF100_DMA_STAT(port_rx_overflow, RX_OVERFLOW_PKTS),
542+
EF100_DMA_STAT(port_rx_nodesc_drops, RX_NODESC_DROPS),
543+
EFX_GENERIC_SW_STAT(rx_nodesc_trunc),
544+
EFX_GENERIC_SW_STAT(rx_noskb_drops),
545+
};
546+
547+
static size_t ef100_describe_stats(struct efx_nic *efx, u8 *names)
548+
{
549+
DECLARE_BITMAP(mask, EF100_STAT_COUNT) = {};
550+
551+
ef100_ethtool_stat_mask(mask);
552+
return efx_nic_describe_stats(ef100_stat_desc, EF100_STAT_COUNT,
553+
mask, names);
554+
}
555+
556+
static size_t ef100_update_stats_common(struct efx_nic *efx, u64 *full_stats,
557+
struct rtnl_link_stats64 *core_stats)
558+
{
559+
struct ef100_nic_data *nic_data = efx->nic_data;
560+
DECLARE_BITMAP(mask, EF100_STAT_COUNT) = {};
561+
size_t stats_count = 0, index;
562+
u64 *stats = nic_data->stats;
563+
564+
ef100_ethtool_stat_mask(mask);
565+
566+
if (full_stats) {
567+
for_each_set_bit(index, mask, EF100_STAT_COUNT) {
568+
if (ef100_stat_desc[index].name) {
569+
*full_stats++ = stats[index];
570+
++stats_count;
571+
}
572+
}
573+
}
574+
575+
if (!core_stats)
576+
return stats_count;
577+
578+
core_stats->rx_packets = stats[EF100_STAT_port_rx_packets];
579+
core_stats->tx_packets = stats[EF100_STAT_port_tx_packets];
580+
core_stats->rx_bytes = stats[EF100_STAT_port_rx_bytes];
581+
core_stats->tx_bytes = stats[EF100_STAT_port_tx_bytes];
582+
core_stats->rx_dropped = stats[EF100_STAT_port_rx_nodesc_drops] +
583+
stats[GENERIC_STAT_rx_nodesc_trunc] +
584+
stats[GENERIC_STAT_rx_noskb_drops];
585+
core_stats->multicast = stats[EF100_STAT_port_rx_multicast];
586+
core_stats->rx_length_errors =
587+
stats[EF100_STAT_port_rx_gtjumbo] +
588+
stats[EF100_STAT_port_rx_length_error];
589+
core_stats->rx_crc_errors = stats[EF100_STAT_port_rx_bad];
590+
core_stats->rx_frame_errors =
591+
stats[EF100_STAT_port_rx_align_error];
592+
core_stats->rx_fifo_errors = stats[EF100_STAT_port_rx_overflow];
593+
core_stats->rx_errors = (core_stats->rx_length_errors +
594+
core_stats->rx_crc_errors +
595+
core_stats->rx_frame_errors);
596+
597+
return stats_count;
598+
}
599+
600+
static size_t ef100_update_stats(struct efx_nic *efx,
601+
u64 *full_stats,
602+
struct rtnl_link_stats64 *core_stats)
603+
{
604+
__le64 *mc_stats = kmalloc(array_size(efx->num_mac_stats, sizeof(__le64)), GFP_ATOMIC);
605+
struct ef100_nic_data *nic_data = efx->nic_data;
606+
DECLARE_BITMAP(mask, EF100_STAT_COUNT) = {};
607+
u64 *stats = nic_data->stats;
608+
609+
ef100_common_stat_mask(mask);
610+
ef100_ethtool_stat_mask(mask);
611+
612+
efx_nic_copy_stats(efx, mc_stats);
613+
efx_nic_update_stats(ef100_stat_desc, EF100_STAT_COUNT, mask,
614+
stats, mc_stats, false);
615+
616+
kfree(mc_stats);
617+
618+
return ef100_update_stats_common(efx, full_stats, core_stats);
619+
}
620+
456621
static int efx_ef100_get_phys_port_id(struct efx_nic *efx,
457622
struct netdev_phys_item_id *ppid)
458623
{
@@ -557,6 +722,11 @@ const struct efx_nic_type ef100_pf_nic_type = {
557722
.rx_restore_rss_contexts = efx_mcdi_rx_restore_rss_contexts,
558723

559724
.reconfigure_mac = ef100_reconfigure_mac,
725+
.describe_stats = ef100_describe_stats,
726+
.start_stats = efx_mcdi_mac_start_stats,
727+
.update_stats = ef100_update_stats,
728+
.pull_stats = efx_mcdi_mac_pull_stats,
729+
.stop_stats = efx_mcdi_mac_stop_stats,
560730

561731
/* Per-type bar/size configuration not used on ef100. Location of
562732
* registers is defined by extended capabilities.

‎drivers/net/ethernet/sfc/ef100_nic.h‎

Lines changed: 41 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -17,6 +17,46 @@ extern const struct efx_nic_type ef100_pf_nic_type;
1717
int ef100_probe_pf(struct efx_nic *efx);
1818
void ef100_remove(struct efx_nic *efx);
1919

20+
enum {
21+
EF100_STAT_port_tx_bytes = GENERIC_STAT_COUNT,
22+
EF100_STAT_port_tx_packets,
23+
EF100_STAT_port_tx_pause,
24+
EF100_STAT_port_tx_unicast,
25+
EF100_STAT_port_tx_multicast,
26+
EF100_STAT_port_tx_broadcast,
27+
EF100_STAT_port_tx_lt64,
28+
EF100_STAT_port_tx_64,
29+
EF100_STAT_port_tx_65_to_127,
30+
EF100_STAT_port_tx_128_to_255,
31+
EF100_STAT_port_tx_256_to_511,
32+
EF100_STAT_port_tx_512_to_1023,
33+
EF100_STAT_port_tx_1024_to_15xx,
34+
EF100_STAT_port_tx_15xx_to_jumbo,
35+
EF100_STAT_port_rx_bytes,
36+
EF100_STAT_port_rx_packets,
37+
EF100_STAT_port_rx_good,
38+
EF100_STAT_port_rx_bad,
39+
EF100_STAT_port_rx_pause,
40+
EF100_STAT_port_rx_unicast,
41+
EF100_STAT_port_rx_multicast,
42+
EF100_STAT_port_rx_broadcast,
43+
EF100_STAT_port_rx_lt64,
44+
EF100_STAT_port_rx_64,
45+
EF100_STAT_port_rx_65_to_127,
46+
EF100_STAT_port_rx_128_to_255,
47+
EF100_STAT_port_rx_256_to_511,
48+
EF100_STAT_port_rx_512_to_1023,
49+
EF100_STAT_port_rx_1024_to_15xx,
50+
EF100_STAT_port_rx_15xx_to_jumbo,
51+
EF100_STAT_port_rx_gtjumbo,
52+
EF100_STAT_port_rx_bad_gtjumbo,
53+
EF100_STAT_port_rx_align_error,
54+
EF100_STAT_port_rx_length_error,
55+
EF100_STAT_port_rx_overflow,
56+
EF100_STAT_port_rx_nodesc_drops,
57+
EF100_STAT_COUNT
58+
};
59+
2060
struct ef100_nic_data {
2161
struct efx_nic *efx;
2262
struct efx_buffer mcdi_buf;
@@ -26,6 +66,7 @@ struct ef100_nic_data {
2666
u16 warm_boot_count;
2767
u8 port_id[ETH_ALEN];
2868
DECLARE_BITMAP(evq_phases, EFX_MAX_CHANNELS);
69+
u64 stats[EF100_STAT_COUNT];
2970
u16 tso_max_hdr_len;
3071
u16 tso_max_payload_num_segs;
3172
u16 tso_max_frames;

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