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Merge branch 'bgmac-fixes'
Jon Mason says: ==================== net: ethernet: bgmac: bug fixes Changes in v5: * Rebased to the latest code and fixed up a compile error due to the mac_addr struct going away (found by David Miller) Changes in v4: * Added the udelays from the previous code (per David Miller) Changes in v3: * Reworked the init sequence patch to only remove the device reset if the device is actually in reset. Given that this code doesn't bear much resemblance to the original code, I'm changing the author of the patch. This was tested on NS2 SVK. Changes in v2: * Reworked the first match to make it more obvious what portions of the register were being preserved (Per Rafal Mileki) * Style change to reorder the function variables in patch 2 (per Sergei Shtylyov) Bug fixes for bgmac driver ==================== Signed-off-by: David S. Miller <[email protected]>
2 parents 2ddbcea + fa42245 commit e285998

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+39
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lines changed

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+39
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lines changed

drivers/net/ethernet/broadcom/bgmac-platform.c

Lines changed: 18 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -51,8 +51,7 @@ static void platform_bgmac_idm_write(struct bgmac *bgmac, u16 offset, u32 value)
5151

5252
static bool platform_bgmac_clk_enabled(struct bgmac *bgmac)
5353
{
54-
if ((bgmac_idm_read(bgmac, BCMA_IOCTL) &
55-
(BCMA_IOCTL_CLK | BCMA_IOCTL_FGC)) != BCMA_IOCTL_CLK)
54+
if ((bgmac_idm_read(bgmac, BCMA_IOCTL) & BGMAC_CLK_EN) != BGMAC_CLK_EN)
5655
return false;
5756
if (bgmac_idm_read(bgmac, BCMA_RESET_CTL) & BCMA_RESET_CTL_RESET)
5857
return false;
@@ -61,15 +60,25 @@ static bool platform_bgmac_clk_enabled(struct bgmac *bgmac)
6160

6261
static void platform_bgmac_clk_enable(struct bgmac *bgmac, u32 flags)
6362
{
64-
bgmac_idm_write(bgmac, BCMA_IOCTL,
65-
(BCMA_IOCTL_CLK | BCMA_IOCTL_FGC | flags));
66-
bgmac_idm_read(bgmac, BCMA_IOCTL);
63+
u32 val;
6764

68-
bgmac_idm_write(bgmac, BCMA_RESET_CTL, 0);
69-
bgmac_idm_read(bgmac, BCMA_RESET_CTL);
70-
udelay(1);
65+
/* The Reset Control register only contains a single bit to show if the
66+
* controller is currently in reset. Do a sanity check here, just in
67+
* case the bootloader happened to leave the device in reset.
68+
*/
69+
val = bgmac_idm_read(bgmac, BCMA_RESET_CTL);
70+
if (val) {
71+
bgmac_idm_write(bgmac, BCMA_RESET_CTL, 0);
72+
bgmac_idm_read(bgmac, BCMA_RESET_CTL);
73+
udelay(1);
74+
}
7175

72-
bgmac_idm_write(bgmac, BCMA_IOCTL, (BCMA_IOCTL_CLK | flags));
76+
val = bgmac_idm_read(bgmac, BCMA_IOCTL);
77+
/* Some bits of BCMA_IOCTL set by HW/ATF and should not change */
78+
val |= flags & ~(BGMAC_AWCACHE | BGMAC_ARCACHE | BGMAC_AWUSER |
79+
BGMAC_ARUSER);
80+
val |= BGMAC_CLK_EN;
81+
bgmac_idm_write(bgmac, BCMA_IOCTL, val);
7382
bgmac_idm_read(bgmac, BCMA_IOCTL);
7483
udelay(1);
7584
}

drivers/net/ethernet/broadcom/bgmac.c

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1223,12 +1223,16 @@ static netdev_tx_t bgmac_start_xmit(struct sk_buff *skb,
12231223
static int bgmac_set_mac_address(struct net_device *net_dev, void *addr)
12241224
{
12251225
struct bgmac *bgmac = netdev_priv(net_dev);
1226+
struct sockaddr *sa = addr;
12261227
int ret;
12271228

12281229
ret = eth_prepare_mac_addr_change(net_dev, addr);
12291230
if (ret < 0)
12301231
return ret;
1231-
bgmac_write_mac_address(bgmac, (u8 *)addr);
1232+
1233+
ether_addr_copy(net_dev->dev_addr, sa->sa_data);
1234+
bgmac_write_mac_address(bgmac, net_dev->dev_addr);
1235+
12321236
eth_commit_mac_addr_change(net_dev, addr);
12331237
return 0;
12341238
}

drivers/net/ethernet/broadcom/bgmac.h

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -213,6 +213,22 @@
213213
/* BCMA GMAC core specific IO Control (BCMA_IOCTL) flags */
214214
#define BGMAC_BCMA_IOCTL_SW_CLKEN 0x00000004 /* PHY Clock Enable */
215215
#define BGMAC_BCMA_IOCTL_SW_RESET 0x00000008 /* PHY Reset */
216+
/* The IOCTL values appear to be different in NS, NSP, and NS2, and do not match
217+
* the values directly above
218+
*/
219+
#define BGMAC_CLK_EN BIT(0)
220+
#define BGMAC_RESERVED_0 BIT(1)
221+
#define BGMAC_SOURCE_SYNC_MODE_EN BIT(2)
222+
#define BGMAC_DEST_SYNC_MODE_EN BIT(3)
223+
#define BGMAC_TX_CLK_OUT_INVERT_EN BIT(4)
224+
#define BGMAC_DIRECT_GMII_MODE BIT(5)
225+
#define BGMAC_CLK_250_SEL BIT(6)
226+
#define BGMAC_AWCACHE (0xf << 7)
227+
#define BGMAC_RESERVED_1 (0x1f << 11)
228+
#define BGMAC_ARCACHE (0xf << 16)
229+
#define BGMAC_AWUSER (0x3f << 20)
230+
#define BGMAC_ARUSER (0x3f << 26)
231+
#define BGMAC_RESERVED BIT(31)
216232

217233
/* BCMA GMAC core specific IO status (BCMA_IOST) flags */
218234
#define BGMAC_BCMA_IOST_ATTACHED 0x00000800

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