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KVM: SVM: Advertise TSA CPUID bits to guests
Commit 31272abd5974b38ba312e9cf2ec2f09f9dd7dcba upstream. Synthesize the TSA CPUID feature bits for guests. Set TSA_{SQ,L1}_NO on unaffected machines. Signed-off-by: Borislav Petkov (AMD) <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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arch/x86/kvm/cpuid.c

Lines changed: 8 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -758,6 +758,12 @@ void kvm_set_cpu_caps(void)
758758
if (cpu_feature_enabled(X86_FEATURE_SRSO_NO))
759759
kvm_cpu_cap_set(X86_FEATURE_SRSO_NO);
760760

761+
kvm_cpu_cap_mask(CPUID_8000_0021_EAX, F(VERW_CLEAR));
762+
763+
kvm_cpu_cap_init_kvm_defined(CPUID_8000_0021_ECX,
764+
F(TSA_SQ_NO) | F(TSA_L1_NO)
765+
);
766+
761767
/*
762768
* Hide RDTSCP and RDPID if either feature is reported as supported but
763769
* probing MSR_TSC_AUX failed. This is purely a sanity check and
@@ -1243,7 +1249,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
12431249
entry->eax = entry->ebx = entry->ecx = entry->edx = 0;
12441250
break;
12451251
case 0x80000021:
1246-
entry->ebx = entry->ecx = entry->edx = 0;
1252+
entry->ebx = entry->edx = 0;
12471253
/*
12481254
* Pass down these bits:
12491255
* EAX 0 NNDBP, Processor ignores nested data breakpoints
@@ -1259,6 +1265,7 @@ static inline int __do_cpuid_func(struct kvm_cpuid_array *array, u32 function)
12591265
entry->eax |= BIT(2);
12601266
if (!static_cpu_has_bug(X86_BUG_NULL_SEG))
12611267
entry->eax |= BIT(6);
1268+
cpuid_entry_override(entry, CPUID_8000_0021_ECX);
12621269
break;
12631270
/*Add support for Centaur's CPUID instruction*/
12641271
case 0xC0000000:

arch/x86/kvm/reverse_cpuid.h

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -14,6 +14,7 @@
1414
enum kvm_only_cpuid_leafs {
1515
CPUID_12_EAX = NCAPINTS,
1616
CPUID_7_2_EDX,
17+
CPUID_8000_0021_ECX,
1718
NR_KVM_CPU_CAPS,
1819

1920
NKVMCAPINTS = NR_KVM_CPU_CAPS - NCAPINTS,
@@ -45,6 +46,10 @@ enum kvm_only_cpuid_leafs {
4546
#define KVM_X86_FEATURE_BHI_CTRL KVM_X86_FEATURE(CPUID_7_2_EDX, 4)
4647
#define X86_FEATURE_MCDT_NO KVM_X86_FEATURE(CPUID_7_2_EDX, 5)
4748

49+
/* CPUID level 0x80000021 (ECX) */
50+
#define KVM_X86_FEATURE_TSA_SQ_NO KVM_X86_FEATURE(CPUID_8000_0021_ECX, 1)
51+
#define KVM_X86_FEATURE_TSA_L1_NO KVM_X86_FEATURE(CPUID_8000_0021_ECX, 2)
52+
4853
struct cpuid_reg {
4954
u32 function;
5055
u32 index;
@@ -71,6 +76,7 @@ static const struct cpuid_reg reverse_cpuid[] = {
7176
[CPUID_8000_001F_EAX] = {0x8000001f, 0, CPUID_EAX},
7277
[CPUID_8000_0021_EAX] = {0x80000021, 0, CPUID_EAX},
7378
[CPUID_7_2_EDX] = { 7, 2, CPUID_EDX},
79+
[CPUID_8000_0021_ECX] = {0x80000021, 0, CPUID_ECX},
7480
};
7581

7682
/*
@@ -107,6 +113,8 @@ static __always_inline u32 __feature_translate(int x86_feature)
107113
KVM_X86_TRANSLATE_FEATURE(SGX2);
108114
KVM_X86_TRANSLATE_FEATURE(RRSBA_CTRL);
109115
KVM_X86_TRANSLATE_FEATURE(BHI_CTRL);
116+
KVM_X86_TRANSLATE_FEATURE(TSA_SQ_NO);
117+
KVM_X86_TRANSLATE_FEATURE(TSA_L1_NO);
110118
default:
111119
return x86_feature;
112120
}

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