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jmaneyrol-invngregkh
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iio: imu: inv_icm42600: fix spi burst write not supported
commit c0f866de4ce447bca3191b9cefac60c4b36a7922 upstream. Burst write with SPI is not working for all icm42600 chips. It was only used for setting user offsets with regmap_bulk_write. Add specific SPI regmap config for using only single write with SPI. Fixes: 9f9ff91 ("iio: imu: inv_icm42600: add SPI driver for inv_icm42600 driver") Cc: [email protected] Signed-off-by: Jean-Baptiste Maneyrol <[email protected]> Link: https://patch.msgid.link/20241112-inv-icm42600-fix-spi-burst-write-not-supported-v2-1-97690dc03607@tdk.com Signed-off-by: Jonathan Cameron <[email protected]> Signed-off-by: Greg Kroah-Hartman <[email protected]>
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drivers/iio/imu/inv_icm42600/inv_icm42600.h

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@@ -360,6 +360,7 @@ struct inv_icm42600_state {
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typedef int (*inv_icm42600_bus_setup)(struct inv_icm42600_state *);
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extern const struct regmap_config inv_icm42600_regmap_config;
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extern const struct regmap_config inv_icm42600_spi_regmap_config;
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extern const struct dev_pm_ops inv_icm42600_pm_ops;
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const struct iio_mount_matrix *

drivers/iio/imu/inv_icm42600/inv_icm42600_core.c

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@@ -43,6 +43,17 @@ const struct regmap_config inv_icm42600_regmap_config = {
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};
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EXPORT_SYMBOL_GPL(inv_icm42600_regmap_config);
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/* define specific regmap for SPI not supporting burst write */
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const struct regmap_config inv_icm42600_spi_regmap_config = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = 0x4FFF,
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.ranges = inv_icm42600_regmap_ranges,
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.num_ranges = ARRAY_SIZE(inv_icm42600_regmap_ranges),
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.use_single_write = true,
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};
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EXPORT_SYMBOL_GPL(inv_icm42600_spi_regmap_config);
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struct inv_icm42600_hw {
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uint8_t whoami;
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const char *name;

drivers/iio/imu/inv_icm42600/inv_icm42600_spi.c

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@@ -59,7 +59,8 @@ static int inv_icm42600_probe(struct spi_device *spi)
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return -EINVAL;
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chip = (uintptr_t)match;
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regmap = devm_regmap_init_spi(spi, &inv_icm42600_regmap_config);
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/* use SPI specific regmap */
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regmap = devm_regmap_init_spi(spi, &inv_icm42600_spi_regmap_config);
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if (IS_ERR(regmap))
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return PTR_ERR(regmap);
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