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[Clang][LoongArch] Fixed incorrect _BitInt(N>64) alignment (llvm#145297)
This patch makes determining alignment and width of BitInt to be target ABI specific and makes it consistent with [Procedure Call Standard for the LoongArch™ Architecture] for LoongArch target (https://github.com/loongson/la-abi-specs/blob/release/lapcs.adoc).
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3 files changed

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‎clang/lib/Basic/Targets/LoongArch.h‎

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -60,6 +60,7 @@ class LLVM_LIBRARY_VISIBILITY LoongArchTargetInfo : public TargetInfo {
6060
SuitableAlign = 128;
6161
WCharType = SignedInt;
6262
WIntType = UnsignedInt;
63+
BitIntMaxAlign = 128;
6364
}
6465

6566
bool setCPU(const std::string &Name) override {

‎clang/test/CodeGen/LoongArch/bitint.c‎

Lines changed: 38 additions & 38 deletions
Original file line numberDiff line numberDiff line change
@@ -12,48 +12,48 @@ void pass_BitInt129(_BitInt(129));
1212
// LA32-SAME: ) #[[ATTR0:[0-9]+]] {
1313
// LA32-NEXT: [[ENTRY:.*:]]
1414
// LA32-NEXT: [[L7:%.*]] = alloca i8, align 1
15-
// LA32-NEXT: [[L65:%.*]] = alloca i128, align 8
16-
// LA32-NEXT: [[L129:%.*]] = alloca i192, align 8
17-
// LA32-NEXT: [[BYVAL_TEMP:%.*]] = alloca i128, align 8
18-
// LA32-NEXT: [[BYVAL_TEMP3:%.*]] = alloca i192, align 8
15+
// LA32-NEXT: [[L65:%.*]] = alloca i128, align 16
16+
// LA32-NEXT: [[L129:%.*]] = alloca [32 x i8], align 16
17+
// LA32-NEXT: [[BYVAL_TEMP:%.*]] = alloca i128, align 16
18+
// LA32-NEXT: [[BYVAL_TEMP3:%.*]] = alloca [32 x i8], align 16
1919
// LA32-NEXT: store i8 0, ptr [[L7]], align 1
20-
// LA32-NEXT: store i128 0, ptr [[L65]], align 8
21-
// LA32-NEXT: store i192 0, ptr [[L129]], align 8
20+
// LA32-NEXT: store i128 0, ptr [[L65]], align 16
21+
// LA32-NEXT: store i256 0, ptr [[L129]], align 16
2222
// LA32-NEXT: [[TMP0:%.*]] = load i8, ptr [[L7]], align 1
2323
// LA32-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i7
2424
// LA32-NEXT: call void @pass_BitInt7(i7 noundef signext [[LOADEDV]])
25-
// LA32-NEXT: [[TMP1:%.*]] = load i128, ptr [[L65]], align 8
25+
// LA32-NEXT: [[TMP1:%.*]] = load i128, ptr [[L65]], align 16
2626
// LA32-NEXT: [[LOADEDV1:%.*]] = trunc i128 [[TMP1]] to i65
2727
// LA32-NEXT: [[STOREDV:%.*]] = sext i65 [[LOADEDV1]] to i128
28-
// LA32-NEXT: store i128 [[STOREDV]], ptr [[BYVAL_TEMP]], align 8
28+
// LA32-NEXT: store i128 [[STOREDV]], ptr [[BYVAL_TEMP]], align 16
2929
// LA32-NEXT: call void @pass_BitInt65(ptr noundef [[BYVAL_TEMP]])
30-
// LA32-NEXT: [[TMP2:%.*]] = load i192, ptr [[L129]], align 8
31-
// LA32-NEXT: [[LOADEDV2:%.*]] = trunc i192 [[TMP2]] to i129
32-
// LA32-NEXT: [[STOREDV4:%.*]] = sext i129 [[LOADEDV2]] to i192
33-
// LA32-NEXT: store i192 [[STOREDV4]], ptr [[BYVAL_TEMP3]], align 8
30+
// LA32-NEXT: [[TMP2:%.*]] = load i256, ptr [[L129]], align 16
31+
// LA32-NEXT: [[LOADEDV2:%.*]] = trunc i256 [[TMP2]] to i129
32+
// LA32-NEXT: [[STOREDV4:%.*]] = sext i129 [[LOADEDV2]] to i256
33+
// LA32-NEXT: store i256 [[STOREDV4]], ptr [[BYVAL_TEMP3]], align 16
3434
// LA32-NEXT: call void @pass_BitInt129(ptr noundef [[BYVAL_TEMP3]])
3535
// LA32-NEXT: ret void
3636
//
3737
// LA64-LABEL: define dso_local void @example_BitInt(
3838
// LA64-SAME: ) #[[ATTR0:[0-9]+]] {
3939
// LA64-NEXT: [[ENTRY:.*:]]
4040
// LA64-NEXT: [[L7:%.*]] = alloca i8, align 1
41-
// LA64-NEXT: [[L65:%.*]] = alloca i128, align 8
42-
// LA64-NEXT: [[L129:%.*]] = alloca [24 x i8], align 8
43-
// LA64-NEXT: [[BYVAL_TEMP:%.*]] = alloca [24 x i8], align 8
41+
// LA64-NEXT: [[L65:%.*]] = alloca i128, align 16
42+
// LA64-NEXT: [[L129:%.*]] = alloca i256, align 16
43+
// LA64-NEXT: [[BYVAL_TEMP:%.*]] = alloca i256, align 16
4444
// LA64-NEXT: store i8 0, ptr [[L7]], align 1
45-
// LA64-NEXT: store i128 0, ptr [[L65]], align 8
46-
// LA64-NEXT: store i192 0, ptr [[L129]], align 8
45+
// LA64-NEXT: store i128 0, ptr [[L65]], align 16
46+
// LA64-NEXT: store i256 0, ptr [[L129]], align 16
4747
// LA64-NEXT: [[TMP0:%.*]] = load i8, ptr [[L7]], align 1
4848
// LA64-NEXT: [[LOADEDV:%.*]] = trunc i8 [[TMP0]] to i7
4949
// LA64-NEXT: call void @pass_BitInt7(i7 noundef signext [[LOADEDV]])
50-
// LA64-NEXT: [[TMP1:%.*]] = load i128, ptr [[L65]], align 8
50+
// LA64-NEXT: [[TMP1:%.*]] = load i128, ptr [[L65]], align 16
5151
// LA64-NEXT: [[LOADEDV1:%.*]] = trunc i128 [[TMP1]] to i65
5252
// LA64-NEXT: call void @pass_BitInt65(i65 noundef [[LOADEDV1]])
53-
// LA64-NEXT: [[TMP2:%.*]] = load i192, ptr [[L129]], align 8
54-
// LA64-NEXT: [[LOADEDV2:%.*]] = trunc i192 [[TMP2]] to i129
55-
// LA64-NEXT: [[STOREDV:%.*]] = sext i129 [[LOADEDV2]] to i192
56-
// LA64-NEXT: store i192 [[STOREDV]], ptr [[BYVAL_TEMP]], align 8
53+
// LA64-NEXT: [[TMP2:%.*]] = load i256, ptr [[L129]], align 16
54+
// LA64-NEXT: [[LOADEDV2:%.*]] = trunc i256 [[TMP2]] to i129
55+
// LA64-NEXT: [[STOREDV:%.*]] = sext i129 [[LOADEDV2]] to i256
56+
// LA64-NEXT: store i256 [[STOREDV]], ptr [[BYVAL_TEMP]], align 16
5757
// LA64-NEXT: call void @pass_BitInt129(ptr noundef [[BYVAL_TEMP]])
5858
// LA64-NEXT: ret void
5959
//
@@ -78,15 +78,15 @@ void example_BitInt(void) {
7878
//
7979
_BitInt(7) return_large_BitInt7(void) { return 0; }
8080
// LA32-LABEL: define dso_local void @return_large_BitInt65(
81-
// LA32-SAME: ptr dead_on_unwind noalias writable sret(i128) align 8 [[AGG_RESULT:%.*]]) #[[ATTR0]] {
81+
// LA32-SAME: ptr dead_on_unwind noalias writable sret(i128) align 16 [[AGG_RESULT:%.*]]) #[[ATTR0]] {
8282
// LA32-NEXT: [[ENTRY:.*:]]
8383
// LA32-NEXT: [[RESULT_PTR:%.*]] = alloca ptr, align 4
8484
// LA32-NEXT: store ptr [[AGG_RESULT]], ptr [[RESULT_PTR]], align 4
85-
// LA32-NEXT: store i128 0, ptr [[AGG_RESULT]], align 8
86-
// LA32-NEXT: [[TMP0:%.*]] = load i128, ptr [[AGG_RESULT]], align 8
85+
// LA32-NEXT: store i128 0, ptr [[AGG_RESULT]], align 16
86+
// LA32-NEXT: [[TMP0:%.*]] = load i128, ptr [[AGG_RESULT]], align 16
8787
// LA32-NEXT: [[LOADEDV:%.*]] = trunc i128 [[TMP0]] to i65
8888
// LA32-NEXT: [[STOREDV:%.*]] = sext i65 [[LOADEDV]] to i128
89-
// LA32-NEXT: store i128 [[STOREDV]], ptr [[AGG_RESULT]], align 8
89+
// LA32-NEXT: store i128 [[STOREDV]], ptr [[AGG_RESULT]], align 16
9090
// LA32-NEXT: ret void
9191
//
9292
// LA64-LABEL: define dso_local i65 @return_large_BitInt65(
@@ -96,27 +96,27 @@ _BitInt(7) return_large_BitInt7(void) { return 0; }
9696
//
9797
_BitInt(65) return_large_BitInt65(void) { return 0; }
9898
// LA32-LABEL: define dso_local void @return_large_BitInt129(
99-
// LA32-SAME: ptr dead_on_unwind noalias writable sret(i192) align 8 [[AGG_RESULT:%.*]]) #[[ATTR0]] {
99+
// LA32-SAME: ptr dead_on_unwind noalias writable sret([32 x i8]) align 16 [[AGG_RESULT:%.*]]) #[[ATTR0]] {
100100
// LA32-NEXT: [[ENTRY:.*:]]
101101
// LA32-NEXT: [[RESULT_PTR:%.*]] = alloca ptr, align 4
102102
// LA32-NEXT: store ptr [[AGG_RESULT]], ptr [[RESULT_PTR]], align 4
103-
// LA32-NEXT: store i192 0, ptr [[AGG_RESULT]], align 8
104-
// LA32-NEXT: [[TMP0:%.*]] = load i192, ptr [[AGG_RESULT]], align 8
105-
// LA32-NEXT: [[LOADEDV:%.*]] = trunc i192 [[TMP0]] to i129
106-
// LA32-NEXT: [[STOREDV:%.*]] = sext i129 [[LOADEDV]] to i192
107-
// LA32-NEXT: store i192 [[STOREDV]], ptr [[AGG_RESULT]], align 8
103+
// LA32-NEXT: store i256 0, ptr [[AGG_RESULT]], align 16
104+
// LA32-NEXT: [[TMP0:%.*]] = load i256, ptr [[AGG_RESULT]], align 16
105+
// LA32-NEXT: [[LOADEDV:%.*]] = trunc i256 [[TMP0]] to i129
106+
// LA32-NEXT: [[STOREDV:%.*]] = sext i129 [[LOADEDV]] to i256
107+
// LA32-NEXT: store i256 [[STOREDV]], ptr [[AGG_RESULT]], align 16
108108
// LA32-NEXT: ret void
109109
//
110110
// LA64-LABEL: define dso_local void @return_large_BitInt129(
111-
// LA64-SAME: ptr dead_on_unwind noalias writable sret([24 x i8]) align 8 [[AGG_RESULT:%.*]]) #[[ATTR0]] {
111+
// LA64-SAME: ptr dead_on_unwind noalias writable sret(i256) align 16 [[AGG_RESULT:%.*]]) #[[ATTR0]] {
112112
// LA64-NEXT: [[ENTRY:.*:]]
113113
// LA64-NEXT: [[RESULT_PTR:%.*]] = alloca ptr, align 8
114114
// LA64-NEXT: store ptr [[AGG_RESULT]], ptr [[RESULT_PTR]], align 8
115-
// LA64-NEXT: store i192 0, ptr [[AGG_RESULT]], align 8
116-
// LA64-NEXT: [[TMP0:%.*]] = load i192, ptr [[AGG_RESULT]], align 8
117-
// LA64-NEXT: [[LOADEDV:%.*]] = trunc i192 [[TMP0]] to i129
118-
// LA64-NEXT: [[STOREDV:%.*]] = sext i129 [[LOADEDV]] to i192
119-
// LA64-NEXT: store i192 [[STOREDV]], ptr [[AGG_RESULT]], align 8
115+
// LA64-NEXT: store i256 0, ptr [[AGG_RESULT]], align 16
116+
// LA64-NEXT: [[TMP0:%.*]] = load i256, ptr [[AGG_RESULT]], align 16
117+
// LA64-NEXT: [[LOADEDV:%.*]] = trunc i256 [[TMP0]] to i129
118+
// LA64-NEXT: [[STOREDV:%.*]] = sext i129 [[LOADEDV]] to i256
119+
// LA64-NEXT: store i256 [[STOREDV]], ptr [[AGG_RESULT]], align 16
120120
// LA64-NEXT: ret void
121121
//
122122
_BitInt(129) return_large_BitInt129(void) { return 0; }

‎clang/test/CodeGen/ext-int-cc.c‎

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -27,8 +27,8 @@
2727
// RUN: %clang_cc1 -no-enable-noundef-analysis -triple arm64_32-apple-ios -O3 -disable-llvm-passes -fexperimental-max-bitint-width=1024 -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64
2828
// RUN: %clang_cc1 -no-enable-noundef-analysis -triple arm64_32-apple-ios -target-abi darwinpcs -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=AARCH64DARWIN
2929
// RUN: %clang_cc1 -no-enable-noundef-analysis -triple arm -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=ARM
30-
// RUN: %clang_cc1 -no-enable-noundef-analysis -triple loongarch64 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LA64
31-
// RUN: %clang_cc1 -no-enable-noundef-analysis -triple loongarch32 -O3 -disable-llvm-passes -emit-llvm -o - %s | FileCheck %s --check-prefixes=LA32
30+
// RUN: %clang_cc1 -no-enable-noundef-analysis -triple loongarch64 -O3 -disable-llvm-passes -fexperimental-max-bitint-width=1024 -emit-llvm -o - %s | FileCheck %s --check-prefixes=LA64
31+
// RUN: %clang_cc1 -no-enable-noundef-analysis -triple loongarch32 -O3 -disable-llvm-passes -fexperimental-max-bitint-width=1024 -emit-llvm -o - %s | FileCheck %s --check-prefixes=LA32
3232

3333
// Make sure 128 and 64 bit versions are passed like integers.
3434
void ParamPassing(_BitInt(128) b, _BitInt(64) c) {}
@@ -158,8 +158,8 @@ void ParamPassing4(_BitInt(129) a) {}
158158
// PPC32-NOT: define{{.*}} void @ParamPassing4(ptr byval(i129) align 8 %{{.+}})
159159
// AARCH64DARWIN-NOT: define{{.*}} void @ParamPassing4(ptr byval(i129) align 8 %{{.+}})
160160
// ARM-NOT: define{{.*}} arm_aapcscc void @ParamPassing4(ptr byval(i129) align 8 %{{.+}})
161-
// LA64-NOT: define{{.*}} void @ParamPassing4(ptr %{{.+}})
162-
// LA32-NOT: define{{.*}} void @ParamPassing4(ptr %{{.+}})
161+
// LA64: define{{.*}} void @ParamPassing4(ptr %{{.+}})
162+
// LA32: define{{.*}} void @ParamPassing4(ptr %{{.+}})
163163
#endif
164164

165165
_BitInt(63) ReturnPassing(void) { return 0; }
@@ -317,8 +317,8 @@ _BitInt(129) ReturnPassing5(void) { return 0; }
317317
// PPC32-NOT: define{{.*}} void @ReturnPassing5(ptr dead_on_unwind noalias writable sret
318318
// AARCH64DARWIN-NOT: define{{.*}} void @ReturnPassing5(ptr dead_on_unwind noalias writable sret
319319
// ARM-NOT: define{{.*}} arm_aapcscc void @ReturnPassing5(ptr dead_on_unwind noalias writable sret
320-
// LA64-NOT: define{{.*}} void @ReturnPassing5(ptr dead_on_unwind noalias writable sret
321-
// LA32-NOT: define{{.*}} void @ReturnPassing5(ptr dead_on_unwind noalias writable sret
320+
// LA64: define{{.*}} void @ReturnPassing5(ptr dead_on_unwind noalias writable sret
321+
// LA32: define{{.*}} void @ReturnPassing5(ptr dead_on_unwind noalias writable sret
322322

323323
// SparcV9 is odd in that it has a return-size limit of 256, not 128 or 64
324324
// like other platforms, so test to make sure this behavior will still work.

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