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[SPIRV] Addition of spe-constant-length-array.ll, bit_reverse_small_type.ll test files (llvm#151645)
--Test for support for specialization constant-based variable-length --Test for ensuring that encoding of variable with undef initializer has correct --Test for bitreverse intrinsic with small types
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‎llvm/test/CodeGen/SPIRV/SpecConstants/spec-constant-length-array.ll

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; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_variable_length_array %s -o - | FileCheck %s
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; RUN: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_variable_length_array %s -o - -filetype=obj | spirv-val %}
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; CHECK: OpCapability VariableLengthArrayINTEL
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; CHECK: OpExtension "SPV_INTEL_variable_length_array"
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; CHECK-DAG: OpDecorate %[[#]] SpecId 0
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; CHECK-DAG: OpDecorate %[[#]] SpecId 1
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; CHECK-DAG: OpDecorate %[[#]] SpecId 2
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; CHECK-DAG: OpDecorate %[[#A0:]] Alignment 4
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; CHECK-DAG: OpDecorate %[[#A1:]] Alignment 2
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; CHECK-DAG: OpDecorate %[[#A2:]] Alignment 16
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; CHECK: %[[#VOID_TY:]] = OpTypeVoid
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; CHECK: %[[#FUNC_TY:]] = OpTypeFunction %[[#VOID_TY]]
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; CHECK-DAG: %[[#I64:]] = OpTypeInt 64 0
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; CHECK-DAG: %[[#I32:]] = OpTypeInt 32 0
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; CHECK-DAG: %[[#I8:]] = OpTypeInt 8 0
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; CHECK-DAG: %[[#F64:]] = OpTypeFloat 64
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; CHECK-DAG: %[[#STRUCT_TY:]] = OpTypeStruct %[[#F64]] %[[#F64]]
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; CHECK-DAG: %[[#PTR_STRUCT:]] = OpTypePointer Function %[[#STRUCT_TY]]
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; CHECK-DAG: %[[#PTR_I8:]] = OpTypePointer Function %[[#I8]]
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; CHECK-DAG: %[[#F32:]] = OpTypeFloat 32
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; CHECK-DAG: %[[#PTR_F32:]] = OpTypePointer Function %[[#F32]]
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; CHECK-DAG: %[[#SC0:]] = OpSpecConstant %[[#I64]] 1
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; CHECK-DAG: %[[#SC1:]] = OpSpecConstant %[[#I32]] 2
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; CHECK-DAG: %[[#SC2:]] = OpSpecConstant %[[#I8]] 4
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; CHECK: %[[#]] = OpFunction %[[#VOID_TY]] None %[[#FUNC_TY]]
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; CHECK: %[[#LABEL:]] = OpLabel
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; CHECK: %[[#A0]] = OpVariableLengthArrayINTEL %[[#PTR_F32]] %[[#SC0]]
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; CHECK: %[[#A1]] = OpVariableLengthArrayINTEL %[[#PTR_I8]] %[[#SC1]]
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; CHECK: %[[#A2]] = OpVariableLengthArrayINTEL %[[#PTR_STRUCT]] %[[#SC2]]
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%struct_type = type { double, double }
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define spir_kernel void @test() {
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entry:
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%length0 = call i64 @_Z20__spirv_SpecConstantix(i32 0, i64 1), !SYCL_SPEC_CONST_SYM_ID !0
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%length1 = call i32 @_Z20__spirv_SpecConstantii(i32 1, i32 2), !SYCL_SPEC_CONST_SYM_ID !1
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%length2 = call i8 @_Z20__spirv_SpecConstantic(i32 2, i8 4), !SYCL_SPEC_CONST_SYM_ID !2
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%scla0 = alloca float, i64 %length0, align 4
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%scla1 = alloca i8, i32 %length1, align 2
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%scla2 = alloca %struct_type, i8 %length2, align 16
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ret void
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}
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declare i8 @_Z20__spirv_SpecConstantic(i32, i8)
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declare i32 @_Z20__spirv_SpecConstantii(i32, i32)
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declare i64 @_Z20__spirv_SpecConstantix(i32, i64)
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!0 = !{!"i64_spec_const", i32 0}
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!1 = !{!"i32_spec_const", i32 1}
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!2 = !{!"i8_spec_const", i32 2}

‎llvm/test/CodeGen/SPIRV/llvm-intrinsics/bitreverse_small_type.ll

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;; Check that llvm.bitreverse.* intrinsics are lowered for
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;; 2/4-bit scalar and vector types.
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; RUN: llc -O0 -verify-machineinstrs -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_arbitrary_precision_integers %s -o - | FileCheck %s
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; TODO: %if spirv-tools %{ llc -O0 -mtriple=spirv64-unknown-unknown --spirv-ext=+SPV_INTEL_arbitrary_precision_integers %s -o - -filetype=obj | spirv-val %}
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; CHECK: OpCapability ArbitraryPrecisionIntegersINTEL
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; CHECK: OpExtension "SPV_INTEL_arbitrary_precision_integers"
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; CHECK: %[[#I4:]] = OpTypeInt 4 0
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; CHECK: %[[#I2:]] = OpTypeInt 2 0
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; CHECK: %[[#Z4:]] = OpConstantNull %[[#I4]]
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; CHECK: %[[#Z2:]] = OpConstantNull %[[#I2]]
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; CHECK: %[[#V2I2:]] = OpTypeVector %[[#I2]] 2
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; CHECK: %[[#V2I4:]] = OpTypeVector %[[#I4]] 2
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; CHECK: %[[#V3I2:]] = OpTypeVector %[[#I2]] 3
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; CHECK: %[[#V3I4:]] = OpTypeVector %[[#I4]] 3
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; CHECK: %[[#V4I2:]] = OpTypeVector %[[#I2]] 4
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; CHECK: %[[#V4I4:]] = OpTypeVector %[[#I4]] 4
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; CHECK: %[[#V8I2:]] = OpTypeVector %[[#I2]] 8
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; CHECK: %[[#V8I4:]] = OpTypeVector %[[#I4]] 8
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; CHECK: %[[#V16I2:]] = OpTypeVector %[[#I2]] 16
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; CHECK: %[[#V16I4:]] = OpTypeVector %[[#I4]] 16
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; CHECK: %[[#]] = OpBitReverse %[[#I2]] %[[#Z2]]
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; CHECK: %[[#]] = OpBitReverse %[[#I4]] %[[#Z4]]
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; CHECK: %[[#]] = OpBitReverse %[[#V2I2]] %[[#]]
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; CHECK: %[[#]] = OpBitReverse %[[#V2I4]] %[[#]]
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; CHECK: %[[#]] = OpBitReverse %[[#V3I2]] %[[#]]
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; CHECK: %[[#]] = OpBitReverse %[[#V3I4]] %[[#]]
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; CHECK: %[[#]] = OpBitReverse %[[#V4I2]] %[[#]]
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; CHECK: %[[#]] = OpBitReverse %[[#V4I4]] %[[#]]
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; CHECK: %[[#]] = OpBitReverse %[[#V8I2]] %[[#]]
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; CHECK: %[[#]] = OpBitReverse %[[#V8I4]] %[[#]]
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; CHECK: %[[#]] = OpBitReverse %[[#V16I2]] %[[#]]
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; CHECK: %[[#]] = OpBitReverse %[[#V16I4]] %[[#]]
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define spir_kernel void @testBitRev() {
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entry:
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%call2 = call i2 @llvm.bitreverse.i2(i2 0)
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%call4 = call i4 @llvm.bitreverse.i4(i4 0)
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ret void
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}
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define spir_kernel void @testBitRevV2(<2 x i2> %a, <2 x i4> %b) {
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entry:
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%call2 = call <2 x i2> @llvm.bitreverse.v2i2(<2 x i2> %a)
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%call4 = call <2 x i4> @llvm.bitreverse.v2i4(<2 x i4> %b)
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ret void
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}
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define spir_kernel void @testBitRevV3(<3 x i2> %a, <3 x i4> %b) {
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entry:
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%call2 = call <3 x i2> @llvm.bitreverse.v3i2(<3 x i2> %a)
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%call4 = call <3 x i4> @llvm.bitreverse.v3i4(<3 x i4> %b)
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ret void
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}
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define spir_kernel void @testBitRevV4(<4 x i2> %a, <4 x i4> %b) {
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entry:
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%call2 = call <4 x i2> @llvm.bitreverse.v4i2(<4 x i2> %a)
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%call4 = call <4 x i4> @llvm.bitreverse.v4i4(<4 x i4> %b)
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ret void
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}
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define spir_kernel void @testBitRevV8(<8 x i2> %a, <8 x i4> %b) {
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entry:
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%call2 = call <8 x i2> @llvm.bitreverse.v8i2(<8 x i2> %a)
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%call4 = call <8 x i4> @llvm.bitreverse.v8i4(<8 x i4> %b)
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ret void
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}
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define spir_kernel void @testBitRevV16(<16 x i2> %a, <16 x i4> %b) {
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entry:
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%call2 = call <16 x i2> @llvm.bitreverse.v16i2(<16 x i2> %a)
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%call4 = call <16 x i4> @llvm.bitreverse.v16i4(<16 x i4> %b)
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ret void
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}
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declare i2 @llvm.bitreverse.i2(i2)
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declare i4 @llvm.bitreverse.i4(i4)
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declare <2 x i2> @llvm.bitreverse.v2i2(<2 x i2>)
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declare <2 x i4> @llvm.bitreverse.v2i4(<2 x i4>)
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declare <3 x i2> @llvm.bitreverse.v3i2(<3 x i2>)
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declare <3 x i4> @llvm.bitreverse.v3i4(<3 x i4>)
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declare <4 x i2> @llvm.bitreverse.v4i2(<4 x i2>)
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declare <4 x i4> @llvm.bitreverse.v4i4(<4 x i4>)
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declare <8 x i2> @llvm.bitreverse.v8i2(<8 x i2>)
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declare <8 x i4> @llvm.bitreverse.v8i4(<8 x i4>)
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declare <16 x i2> @llvm.bitreverse.v16i2(<16 x i2>)
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declare <16 x i4> @llvm.bitreverse.v16i4(<16 x i4>)

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