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[llvm] Proofread MIRLangRef.rst (llvm#152263)
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llvm/docs/MIRLangRef.rst

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@@ -27,7 +27,7 @@ data serialization language, and the full YAML language spec can be read at
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`yaml.org
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<http://www.yaml.org/spec/1.2/spec.html#Introduction>`_.
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A MIR file is split up into a series of `YAML documents`_. The first document
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A MIR file is split into a series of `YAML documents`_. The first document
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can contain an optional embedded LLVM IR module, and the rest of the documents
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contain the serialized machine functions.
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@@ -65,22 +65,22 @@ after the name with a comma.
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``llc -stop-after=dead-mi-elimination,1 bug-trigger.ll -o test.mir``
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After generating the input MIR file, you'll have to add a run line that uses
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After generating the input MIR file, you'll have to add a ``RUN`` line that uses
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the ``-run-pass`` option to it. In order to test the post register allocation
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pseudo instruction expansion pass on X86-64, a run line like the one shown
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below can be used:
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``# RUN: llc -o - %s -mtriple=x86_64-- -run-pass=postrapseudos | FileCheck %s``
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The MIR files are target dependent, so they have to be placed in the target
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specific test directories (``lib/CodeGen/TARGETNAME``). They also need to
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specify a target triple or a target architecture either in the run line or in
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The MIR files are target dependent, so they have to be placed in the
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target-specific test directories (``lib/CodeGen/TARGETNAME``). They also need to
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specify a target triple or a target architecture either in the ``RUN`` line or in
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the embedded LLVM IR module.
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Simplifying MIR files
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^^^^^^^^^^^^^^^^^^^^^
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The MIR code coming out of ``-stop-after``/``-stop-before`` is very verbose;
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The MIR code coming out of ``-stop-after``/``-stop-before`` is very verbose.
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Tests are more accessible and future proof when simplified:
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- Use the ``-simplify-mir`` option with llc.
@@ -113,12 +113,12 @@ Tests are more accessible and future proof when simplified:
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If the test doesn't depend on (good) alias analysis the references can be
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dropped: `:: (load 8)`
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- MIR blocks can reference IR blocks for debug printing, profile information
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- MIR blocks can reference IR blocks for debug printing, profile information,
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or debug locations. Example: `bb.42.myblock` in MIR references the IR block
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`myblock`. It is usually possible to drop the `.myblock` reference and simply
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use `bb.42`.
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- If there are no memory operands or blocks referencing the IR then the
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- If there are no memory operands or blocks referencing the IR, then the
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IR function can be replaced by a parameterless dummy function like
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`define @func() { ret void }`.
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@@ -143,7 +143,7 @@ can serialize:
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- The ``MCSymbol`` machine operands don't support temporary or local symbols.
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- A lot of the state in ``MachineModuleInfo`` isn't serialized - only the CFI
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instructions and the variable debug information from MMI is serialized right
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instructions and the variable debug information from MMI are serialized right
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now.
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These limitations impose restrictions on what you can test with the MIR format.
@@ -182,7 +182,7 @@ Machine Functions
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-----------------
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The remaining YAML documents contain the machine functions. This is an example
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of such YAML document:
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of such a YAML document:
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.. code-block:: text
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@@ -299,7 +299,7 @@ instructions:
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bb.2.else:
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<instructions>
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The branch weights can be specified in brackets after the successor blocks.
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The branch weights can be specified in parentheses after the successor blocks.
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The example below defines a block that has two successors with branch weights
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of 32 and 16:
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@@ -314,22 +314,22 @@ Live In Registers
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^^^^^^^^^^^^^^^^^
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The machine basic block's live in registers have to be specified before any of
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the instructions:
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its instructions:
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.. code-block:: text
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bb.0.entry:
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liveins: $edi, $esi
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The list of live in registers and successors can be empty. The language also
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allows multiple live in register and successor lists - they are combined into
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allows multiple live in register and successor lists; they are combined into
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one list by the parser.
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Miscellaneous Attributes
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^^^^^^^^^^^^^^^^^^^^^^^^
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The attributes ``IsAddressTaken``, ``IsLandingPad``,
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``IsInlineAsmBrIndirectTarget`` and ``Alignment`` can be specified in brackets
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``IsInlineAsmBrIndirectTarget`` and ``Alignment`` can be specified in parentheses
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after the block's definition:
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.. code-block:: text
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Registers
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---------
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Registers are one of the key primitives in the machine instructions
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Registers are one of the key primitives in the machine instruction
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serialization language. They are primarily used in the
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:ref:`register machine operands <register-operands>`,
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but they can also be used in a number of other places, like the
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%1:gpr64 = SUBREG_TO_REG 0, %0, %subreg.sub_32
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For integers > 64bit, we use a special machine operand, ``MO_CImmediate``,
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For integers > 64 bits, we use a special machine operand, ``MO_CImmediate``,
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which stores the immediate in a ``ConstantInt`` using an ``APInt`` (LLVM's
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arbitrary precision integers).
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arbitrary-precision integers).
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.. TODO: Describe the FPIMM immediate operands.
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@@ -626,7 +626,7 @@ For a CPI with the index 0 and offset -12:
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%1:gr64 = MOV64ri %const.0 - 12
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A constant pool entry is bound to a LLVM IR ``Constant`` or a target-specific
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``MachineConstantPoolValue``. When serializing all the function's constants the
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``MachineConstantPoolValue``. When serializing all the function's constants, the
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following format is used:
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.. code-block:: text
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Jump-table Index Operands
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^^^^^^^^^^^^^^^^^^^^^^^^^
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A jump-table index operand with the index 0 is printed as following:
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A jump-table index operand with the index 0 is printed as follows:
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.. code-block:: text
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- id: <index>
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blocks: [ <bbreference>, <bbreference>, ... ]
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where ``<kind>`` is describing how the jump table is represented and emitted (plain address, relocations, PIC, etc.), and each ``<index>`` is a 32-bit unsigned integer and ``blocks`` contains a list of :ref:`machine basic block references <block-references>`.
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where ``<kind>`` describes how the jump table is represented and emitted (plain address, relocations, PIC, etc.), and each ``<index>`` is a 32-bit unsigned integer and ``blocks`` contains a list of :ref:`machine basic block references <block-references>`.
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Example:
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MCSymbol Operands
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^^^^^^^^^^^^^^^^^
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A MCSymbol operand is holding a pointer to a ``MCSymbol``. For the limitations
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A MCSymbol operand holds a pointer to a ``MCSymbol``. For the limitations
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of this operand in MIR, see :ref:`limitations <limitations>`.
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The syntax is:
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^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
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A debug instruction reference operand is a pair of indices, referring to an
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instruction and an operand within that instruction respectively; see
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instruction and an operand within that instruction, respectively; see
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:ref:`Instruction referencing locations <instruction-referencing-locations>`.
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The example below uses a reference to Instruction 1, Operand 0:
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CFIIndex Operands
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^^^^^^^^^^^^^^^^^
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A CFI Index operand is holding an index into a per-function side-table,
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A CFI Index operand holds an index into a per-function side-table,
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``MachineFunction::getFrameInstructions()``, which references all the frame
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instructions in a ``MachineFunction``. A ``CFI_INSTRUCTION`` may look like it
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contains multiple operands, but the only operand it contains is the CFI Index.
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Debug-Info constructs
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---------------------
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Most of the debugging information in a MIR file is to be found in the metadata
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Most of the debugging information in a MIR file is found in the metadata
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of the embedded module. Within a machine function, that metadata is referred to
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by various constructs to describe source locations and variable locations.
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