Skip to content

Commit ec92f9e

Browse files
MaskRaykrishna2803
MaskRay
authored and
krishna2803
committed
RISCVAsmBackend::relaxDwarflineAddr: Try special opcode
LoongArch llvm#77728 did better than RISCV. If the label difference can be resolved (there is no linker-relaxable fragment in between), we should use the default handling, which utilizes a shorter special opcode.
1 parent 8e3f6b5 commit ec92f9e

File tree

2 files changed

+104
-90
lines changed

2 files changed

+104
-90
lines changed

‎llvm/lib/Target/RISCV/MCTargetDesc/RISCVAsmBackend.cpp

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -327,13 +327,15 @@ bool RISCVAsmBackend::relaxAlign(MCFragment &F, unsigned &Size) {
327327

328328
bool RISCVAsmBackend::relaxDwarfLineAddr(MCFragment &F,
329329
bool &WasRelaxed) const {
330-
MCContext &C = getContext();
331-
332330
int64_t LineDelta = F.getDwarfLineDelta();
333331
const MCExpr &AddrDelta = F.getDwarfAddrDelta();
334332
size_t OldSize = F.getVarSize();
335333

336334
int64_t Value;
335+
// If the label difference can be resolved, use the default handling, which
336+
// utilizes a shorter special opcode.
337+
if (AddrDelta.evaluateAsAbsolute(Value, *Asm))
338+
return false;
337339
[[maybe_unused]] bool IsAbsolute =
338340
AddrDelta.evaluateKnownAbsolute(Value, *Asm);
339341
assert(IsAbsolute && "CFA with invalid expression");
@@ -352,12 +354,10 @@ bool RISCVAsmBackend::relaxDwarfLineAddr(MCFragment &F,
352354
// value is therefore 65535. Set a conservative upper bound for relaxation.
353355
unsigned PCBytes;
354356
if (Value > 60000) {
355-
unsigned PtrSize = C.getAsmInfo()->getCodePointerSize();
356-
assert((PtrSize == 4 || PtrSize == 8) && "Unexpected pointer size");
357-
PCBytes = PtrSize;
358-
OS << uint8_t(dwarf::DW_LNS_extended_op) << uint8_t(PtrSize + 1)
357+
PCBytes = getContext().getAsmInfo()->getCodePointerSize();
358+
OS << uint8_t(dwarf::DW_LNS_extended_op) << uint8_t(PCBytes + 1)
359359
<< uint8_t(dwarf::DW_LNE_set_address);
360-
OS.write_zeros(PtrSize);
360+
OS.write_zeros(PCBytes);
361361
} else {
362362
PCBytes = 2;
363363
OS << uint8_t(dwarf::DW_LNS_fixed_advance_pc);

‎llvm/test/DebugInfo/RISCV/dwarf-riscv-relocs.ll

Lines changed: 97 additions & 83 deletions
Original file line numberDiff line numberDiff line change
@@ -1,21 +1,45 @@
11
; RUN: llc -filetype=obj -mtriple=riscv32 -mattr=+relax %s -o %t.o
2-
; RUN: llvm-readobj -r %t.o | FileCheck -check-prefix=READOBJ-RELOCS %s
2+
; RUN: llvm-readobj -r %t.o | FileCheck -check-prefix=RELOC %s
33
; RUN: llvm-objdump --source %t.o | FileCheck --check-prefix=OBJDUMP-SOURCE %s
4-
; RUN: llvm-dwarfdump --debug-info %t.o | \
5-
; RUN: FileCheck -check-prefix=DWARF-DUMP %s
6-
; RUN: llvm-dwarfdump --debug-line -v %t.o | \
7-
; RUN: FileCheck -check-prefix=LINE-DUMP %s
4+
; RUN: llvm-dwarfdump --debug-info -debug-line -v %t.o | \
5+
; RUN: FileCheck -check-prefix=DWARF %s
86

9-
; Check that we actually have relocations, otherwise this is kind of pointless.
10-
; READOBJ-RELOCS: Section ({{.*}}) .rela.debug_info {
11-
; READOBJ-RELOCS: 0x1B R_RISCV_ADD32 .L0 0x0
12-
; READOBJ-RELOCS-NEXT: 0x1B R_RISCV_SUB32 .L0 0x0
13-
; READOBJ-RELOCS: Section ({{.*}}) .rela.debug_frame {
14-
; READOBJ-RELOCS: 0x20 R_RISCV_ADD32 .L0 0x0
15-
; READOBJ-RELOCS-NEXT: 0x20 R_RISCV_SUB32 .L0 0x0
16-
; READOBJ-RELOCS: Section ({{.*}}) .rela.debug_line {
17-
; READOBJ-RELOCS: 0x5A R_RISCV_ADD16 .L0 0x0
18-
; READOBJ-RELOCS-NEXT: 0x5A R_RISCV_SUB16 .L0 0x0
7+
; RELOC: .rela.debug_info {
8+
; RELOC-NEXT: 0x8 R_RISCV_32 .debug_abbrev 0x0
9+
; RELOC-NEXT: 0x11 R_RISCV_32 .L0 0x0
10+
; RELOC-NEXT: 0x15 R_RISCV_32 .Lline_table_start0 0x0
11+
; RELOC-NEXT: 0x1B R_RISCV_ADD32 .L0 0x0
12+
; RELOC-NEXT: 0x1B R_RISCV_SUB32 .L0 0x0
13+
; RELOC-NEXT: 0x1F R_RISCV_32 .L0 0x0
14+
; RELOC-NEXT: 0x25 R_RISCV_ADD32 .L0 0x0
15+
; RELOC-NEXT: 0x25 R_RISCV_SUB32 .L0 0x0
16+
; RELOC-NEXT: }
17+
; RELOC-NEXT: .rela.debug_str_offsets {
18+
; RELOC-NEXT: 0x8 R_RISCV_32 .L0 0x0
19+
; RELOC-NEXT: 0xC R_RISCV_32 .L0 0x0
20+
; RELOC-NEXT: 0x10 R_RISCV_32 .L0 0x0
21+
; RELOC-NEXT: 0x14 R_RISCV_32 .L0 0x0
22+
; RELOC-NEXT: 0x18 R_RISCV_32 .L0 0x0
23+
; RELOC-NEXT: }
24+
; RELOC-NEXT: .rela.debug_addr {
25+
; RELOC-NEXT: 0x8 R_RISCV_32 .L0 0x0
26+
; RELOC-NEXT: }
27+
; RELOC-NEXT: .rela.debug_frame {
28+
; RELOC-NEXT: 0x18 R_RISCV_32 .L0 0x0
29+
; RELOC-NEXT: 0x1C R_RISCV_32 .L0 0x0
30+
; RELOC-NEXT: 0x20 R_RISCV_ADD32 .L0 0x0
31+
; RELOC-NEXT: 0x20 R_RISCV_SUB32 .L0 0x0
32+
; RELOC-NEXT: 0x33 R_RISCV_SET6 .L0 0x0
33+
; RELOC-NEXT: 0x33 R_RISCV_SUB6 .L0 0x0
34+
; RELOC-NEXT: }
35+
; RELOC-NEXT: .rela.debug_line {
36+
; RELOC-NEXT: 0x22 R_RISCV_32 .debug_line_str 0x0
37+
; RELOC-NEXT: 0x31 R_RISCV_32 .debug_line_str 0x2
38+
; RELOC-NEXT: 0x46 R_RISCV_32 .debug_line_str 0x17
39+
; RELOC-NEXT: 0x4F R_RISCV_32 .L0 0x0
40+
; RELOC-NEXT: 0x5B R_RISCV_ADD16 .L0 0x0
41+
; RELOC-NEXT: 0x5B R_RISCV_SUB16 .L0 0x0
42+
; RELOC-NEXT: }
1943

2044
; Check that we can print the source, even with relocations.
2145
; OBJDUMP-SOURCE: Disassembly of section .text:
@@ -24,70 +48,61 @@
2448
; OBJDUMP-SOURCE: ; {
2549
; OBJDUMP-SOURCE: ; return 0;
2650

27-
; Check that we correctly dump the DWARF info, even with relocations.
28-
; DWARF-DUMP: DW_AT_name ("dwarf-riscv-relocs.c")
29-
; DWARF-DUMP: DW_AT_comp_dir (".")
30-
; DWARF-DUMP: DW_AT_name ("main")
31-
; DWARF-DUMP: DW_AT_decl_file ("{{.*}}dwarf-riscv-relocs.c")
32-
; DWARF-DUMP: DW_AT_decl_line (1)
33-
; DWARF-DUMP: DW_AT_type (0x00000032 "int")
34-
; DWARF-DUMP: DW_AT_name ("int")
35-
; DWARF-DUMP: DW_AT_encoding (DW_ATE_signed)
36-
; DWARF-DUMP: DW_AT_byte_size (0x04)
37-
38-
; LINE-DUMP: .debug_line contents:
39-
; LINE-DUMP-NEXT: debug_line[0x00000000]
40-
; LINE-DUMP-NEXT: Line table prologue:
41-
; LINE-DUMP-NEXT: total_length: 0x00000061
42-
; LINE-DUMP-NEXT: format: DWARF32
43-
; LINE-DUMP-NEXT: version: 5
44-
; LINE-DUMP-NEXT: address_size: 4
45-
; LINE-DUMP-NEXT: seg_select_size: 0
46-
; LINE-DUMP-NEXT: prologue_length: 0x0000003e
47-
; LINE-DUMP-NEXT: min_inst_length: 1
48-
; LINE-DUMP-NEXT: max_ops_per_inst: 1
49-
; LINE-DUMP-NEXT: default_is_stmt: 1
50-
; LINE-DUMP-NEXT: line_base: -5
51-
; LINE-DUMP-NEXT: line_range: 14
52-
; LINE-DUMP-NEXT: opcode_base: 13
53-
; LINE-DUMP-NEXT: standard_opcode_lengths[DW_LNS_copy] = 0
54-
; LINE-DUMP-NEXT: standard_opcode_lengths[DW_LNS_advance_pc] = 1
55-
; LINE-DUMP-NEXT: standard_opcode_lengths[DW_LNS_advance_line] = 1
56-
; LINE-DUMP-NEXT: standard_opcode_lengths[DW_LNS_set_file] = 1
57-
; LINE-DUMP-NEXT: standard_opcode_lengths[DW_LNS_set_column] = 1
58-
; LINE-DUMP-NEXT: standard_opcode_lengths[DW_LNS_negate_stmt] = 0
59-
; LINE-DUMP-NEXT: standard_opcode_lengths[DW_LNS_set_basic_block] = 0
60-
; LINE-DUMP-NEXT: standard_opcode_lengths[DW_LNS_const_add_pc] = 0
61-
; LINE-DUMP-NEXT: standard_opcode_lengths[DW_LNS_fixed_advance_pc] = 1
62-
; LINE-DUMP-NEXT: standard_opcode_lengths[DW_LNS_set_prologue_end] = 0
63-
; LINE-DUMP-NEXT: standard_opcode_lengths[DW_LNS_set_epilogue_begin] = 0
64-
; LINE-DUMP-NEXT: standard_opcode_lengths[DW_LNS_set_isa] = 1
65-
; LINE-DUMP-NEXT: include_directories[ 0] = .debug_line_str[0x00000000] = "."
66-
; LINE-DUMP-NEXT: file_names[ 0]:
67-
; LINE-DUMP-NEXT: name: .debug_line_str[0x00000002] = "dwarf-riscv-relocs.c"
68-
; LINE-DUMP-NEXT: dir_index: 0
69-
; LINE-DUMP-NEXT: md5_checksum: 05ab89f5481bc9f2d037e7886641e919
70-
; LINE-DUMP-NEXT: source: .debug_line_str[0x00000017] = "int main()\n{\n return 0;\n}\n"
71-
; LINE-DUMP-EMPTY:
72-
; LINE-DUMP-NEXT: Address Line Column File ISA Discriminator OpIndex Flags
73-
; LINE-DUMP-NEXT: ------------------ ------ ------ ------ --- ------------- ------- -------------
74-
; LINE-DUMP-NEXT:0x0000004a: 04 DW_LNS_set_file (0)
75-
; LINE-DUMP-NEXT:0x0000004c: 00 DW_LNE_set_address (0x00000000)
76-
; LINE-DUMP-NEXT:0x00000053: 13 address += 0, line += 1, op-index += 0
77-
; LINE-DUMP-NEXT: 0x0000000000000000 2 0 0 0 0 0 is_stmt
78-
; LINE-DUMP-NEXT:0x00000054: 05 DW_LNS_set_column (5)
79-
; LINE-DUMP-NEXT:0x00000056: 0a DW_LNS_set_prologue_end
80-
; LINE-DUMP-NEXT:0x00000057: 03 DW_LNS_advance_line (3)
81-
; LINE-DUMP-NEXT:0x00000059: 09 DW_LNS_fixed_advance_pc (addr += 0x001c, op-index = 0)
82-
; LINE-DUMP-NEXT:0x0000005c: 01 DW_LNS_copy
83-
; LINE-DUMP-NEXT: 0x000000000000001c 3 5 0 0 0 0 is_stmt prologue_end
84-
; LINE-DUMP-NEXT:0x0000005d: 06 DW_LNS_negate_stmt
85-
; LINE-DUMP-NEXT:0x0000005e: 0b DW_LNS_set_epilogue_begin
86-
; LINE-DUMP-NEXT:0x0000005f: 4a address += 4, line += 0, op-index += 0
87-
; LINE-DUMP-NEXT: 0x0000000000000020 3 5 0 0 0 0 epilogue_begin
88-
; LINE-DUMP-NEXT:0x00000060: 02 DW_LNS_advance_pc (addr += 16, op-index += 0)
89-
; LINE-DUMP-NEXT:0x00000062: 00 DW_LNE_end_sequence
90-
; LINE-DUMP-NEXT: 0x0000000000000030 3 5 0 0 0 0 end_sequence
51+
; DWARF: .debug_line contents:
52+
; DWARF-NEXT: debug_line[0x00000000]
53+
; DWARF-NEXT: Line table prologue:
54+
; DWARF-NEXT: total_length: 0x00000062
55+
; DWARF-NEXT: format: DWARF32
56+
; DWARF-NEXT: version: 5
57+
; DWARF-NEXT: address_size: 4
58+
; DWARF-NEXT: seg_select_size: 0
59+
; DWARF-NEXT: prologue_length: 0x0000003e
60+
; DWARF-NEXT: min_inst_length: 1
61+
; DWARF-NEXT: max_ops_per_inst: 1
62+
; DWARF-NEXT: default_is_stmt: 1
63+
; DWARF-NEXT: line_base: -5
64+
; DWARF-NEXT: line_range: 14
65+
; DWARF-NEXT: opcode_base: 13
66+
; DWARF-NEXT: standard_opcode_lengths[DW_LNS_copy] = 0
67+
; DWARF-NEXT: standard_opcode_lengths[DW_LNS_advance_pc] = 1
68+
; DWARF-NEXT: standard_opcode_lengths[DW_LNS_advance_line] = 1
69+
; DWARF-NEXT: standard_opcode_lengths[DW_LNS_set_file] = 1
70+
; DWARF-NEXT: standard_opcode_lengths[DW_LNS_set_column] = 1
71+
; DWARF-NEXT: standard_opcode_lengths[DW_LNS_negate_stmt] = 0
72+
; DWARF-NEXT: standard_opcode_lengths[DW_LNS_set_basic_block] = 0
73+
; DWARF-NEXT: standard_opcode_lengths[DW_LNS_const_add_pc] = 0
74+
; DWARF-NEXT: standard_opcode_lengths[DW_LNS_fixed_advance_pc] = 1
75+
; DWARF-NEXT: standard_opcode_lengths[DW_LNS_set_prologue_end] = 0
76+
; DWARF-NEXT: standard_opcode_lengths[DW_LNS_set_epilogue_begin] = 0
77+
; DWARF-NEXT: standard_opcode_lengths[DW_LNS_set_isa] = 1
78+
; DWARF-NEXT: include_directories[ 0] = .debug_line_str[0x00000000] = "."
79+
; DWARF-NEXT: file_names[ 0]:
80+
; DWARF-NEXT: name: .debug_line_str[0x00000002] = "dwarf-riscv-relocs.c"
81+
; DWARF-NEXT: dir_index: 0
82+
; DWARF-NEXT: md5_checksum: 05ab89f5481bc9f2d037e7886641e919
83+
; DWARF-NEXT: source: .debug_line_str[0x00000017] = "int main()\n{\n return 0;\n}\n"
84+
; DWARF-EMPTY:
85+
; DWARF-NEXT: Address Line Column File ISA Discriminator OpIndex Flags
86+
; DWARF-NEXT: ------------------ ------ ------ ------ --- ------------- ------- -------------
87+
; DWARF-NEXT:0x0000004a: 04 DW_LNS_set_file (0)
88+
; DWARF-NEXT:0x0000004c: 00 DW_LNE_set_address (0x00000000)
89+
; DWARF-NEXT:0x00000053: 13 address += 0, line += 1, op-index += 0
90+
; DWARF-NEXT: 0x0000000000000000 2 0 0 0 0 0 is_stmt
91+
; DWARF-NEXT:0x00000054: 05 DW_LNS_set_column (5)
92+
; DWARF-NEXT:0x00000056: 0a DW_LNS_set_prologue_end
93+
; DWARF-NEXT:0x00000057: f3 address += 16, line += 1, op-index += 0
94+
; DWARF-NEXT: 0x0000000000000010 3 5 0 0 0 0 is_stmt prologue_end
95+
; DWARF-NEXT:0x00000058: 03 DW_LNS_advance_line (4)
96+
; DWARF-NEXT:0x0000005a: 09 DW_LNS_fixed_advance_pc (addr += 0x0010, op-index = 0)
97+
; DWARF-NEXT:0x0000005d: 01 DW_LNS_copy
98+
; DWARF-NEXT: 0x0000000000000020 4 5 0 0 0 0 is_stmt
99+
; DWARF-NEXT:0x0000005e: 06 DW_LNS_negate_stmt
100+
; DWARF-NEXT:0x0000005f: 0b DW_LNS_set_epilogue_begin
101+
; DWARF-NEXT:0x00000060: 4a address += 4, line += 0, op-index += 0
102+
; DWARF-NEXT: 0x0000000000000024 4 5 0 0 0 0 epilogue_begin
103+
; DWARF-NEXT:0x00000061: 02 DW_LNS_advance_pc (addr += 16, op-index += 0)
104+
; DWARF-NEXT:0x00000063: 00 DW_LNE_end_sequence
105+
; DWARF-NEXT: 0x0000000000000034 4 5 0 0 0 0 end_sequence
91106

92107
; ModuleID = 'dwarf-riscv-relocs.c'
93108
source_filename = "dwarf-riscv-relocs.c"
@@ -97,10 +112,8 @@ target triple = "riscv32"
97112
; Function Attrs: noinline nounwind optnone
98113
define dso_local i32 @main() #0 !dbg !7 {
99114
entry:
100-
call void @ext()
101-
%retval = alloca i32, align 4
102-
store i32 0, ptr %retval, align 4
103-
ret i32 0, !dbg !11
115+
call void asm sideeffect ".cfi_remember_state\0A\09.cfi_adjust_cfa_offset 16\0A\09nop\0A\09call ext\0A\09nop\0A\09.cfi_restore_state\0A\09", ""() #1, !dbg !11
116+
ret i32 0, !dbg !12
104117
}
105118

106119
declare void @ext()
@@ -123,3 +136,4 @@ attributes #0 = { noinline nounwind optnone "correctly-rounded-divide-sqrt-fp-ma
123136
!9 = !{!10}
124137
!10 = !DIBasicType(name: "int", size: 32, encoding: DW_ATE_signed)
125138
!11 = !DILocation(line: 3, column: 5, scope: !7)
139+
!12 = !DILocation(line: 4, column: 5, scope: !7)

0 commit comments

Comments
 (0)