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Merge branch 'pci/controller/amd-mdb'
- Update DT binding example to separate PERST# to a Root Port stanza to make multiple Root Ports possible in the future (Sai Krishna Musham) - Add driver support for Root Port PERST# (Sai Krishna Musham) * pci/controller/amd-mdb: PCI: amd-mdb: Add support for PCIe RP PERST# signal handling dt-bindings: PCI: amd-mdb: Add example usage of reset-gpios for PCIe RP PERST#
2 parents f26502c + 1d0156c commit df1d435

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Documentation/devicetree/bindings/pci/amd,versal2-mdb-host.yaml

Lines changed: 22 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,17 @@ properties:
7171
- "#address-cells"
7272
- "#interrupt-cells"
7373

74+
patternProperties:
75+
'^pcie@[0-2],0$':
76+
type: object
77+
$ref: /schemas/pci/pci-pci-bridge.yaml#
78+
79+
properties:
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reg:
81+
maxItems: 1
82+
83+
unevaluatedProperties: false
84+
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required:
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- reg
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- reg-names
@@ -87,6 +98,7 @@ examples:
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- |
8899
#include <dt-bindings/interrupt-controller/arm-gic.h>
89100
#include <dt-bindings/interrupt-controller/irq.h>
101+
#include <dt-bindings/gpio/gpio.h>
90102
91103
soc {
92104
#address-cells = <2>;
@@ -112,6 +124,16 @@ examples:
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#size-cells = <2>;
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#interrupt-cells = <1>;
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device_type = "pci";
127+
128+
pcie@0,0 {
129+
device_type = "pci";
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reg = <0x0 0x0 0x0 0x0 0x0>;
131+
reset-gpios = <&tca6416_u37 7 GPIO_ACTIVE_LOW>;
132+
#address-cells = <3>;
133+
#size-cells = <2>;
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ranges;
135+
};
136+
115137
pcie_intc_0: interrupt-controller {
116138
#address-cells = <0>;
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#interrupt-cells = <1>;

drivers/pci/controller/dwc/pcie-amd-mdb.c

Lines changed: 51 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -18,6 +18,7 @@
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#include <linux/resource.h>
1919
#include <linux/types.h>
2020

21+
#include "../../pci.h"
2122
#include "pcie-designware.h"
2223

2324
#define AMD_MDB_TLP_IR_STATUS_MISC 0x4C0
@@ -56,13 +57,15 @@
5657
* @slcr: MDB System Level Control and Status Register (SLCR) base
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* @intx_domain: INTx IRQ domain pointer
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* @mdb_domain: MDB IRQ domain pointer
60+
* @perst_gpio: GPIO descriptor for PERST# signal handling
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* @intx_irq: INTx IRQ interrupt number
6062
*/
6163
struct amd_mdb_pcie {
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struct dw_pcie pci;
6365
void __iomem *slcr;
6466
struct irq_domain *intx_domain;
6567
struct irq_domain *mdb_domain;
68+
struct gpio_desc *perst_gpio;
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int intx_irq;
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};
6871

@@ -284,7 +287,7 @@ static int amd_mdb_pcie_init_irq_domains(struct amd_mdb_pcie *pcie,
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struct device_node *pcie_intc_node;
285288
int err;
286289

287-
pcie_intc_node = of_get_next_child(node, NULL);
290+
pcie_intc_node = of_get_child_by_name(node, "interrupt-controller");
288291
if (!pcie_intc_node) {
289292
dev_err(dev, "No PCIe Intc node found\n");
290293
return -ENODEV;
@@ -402,6 +405,28 @@ static int amd_mdb_setup_irq(struct amd_mdb_pcie *pcie,
402405
return 0;
403406
}
404407

408+
static int amd_mdb_parse_pcie_port(struct amd_mdb_pcie *pcie)
409+
{
410+
struct device *dev = pcie->pci.dev;
411+
struct device_node *pcie_port_node __maybe_unused;
412+
413+
/*
414+
* This platform currently supports only one Root Port, so the loop
415+
* will execute only once.
416+
* TODO: Enhance the driver to handle multiple Root Ports in the future.
417+
*/
418+
for_each_child_of_node_with_prefix(dev->of_node, pcie_port_node, "pcie") {
419+
pcie->perst_gpio = devm_fwnode_gpiod_get(dev, of_fwnode_handle(pcie_port_node),
420+
"reset", GPIOD_OUT_HIGH, NULL);
421+
if (IS_ERR(pcie->perst_gpio))
422+
return dev_err_probe(dev, PTR_ERR(pcie->perst_gpio),
423+
"Failed to request reset GPIO\n");
424+
return 0;
425+
}
426+
427+
return -ENODEV;
428+
}
429+
405430
static int amd_mdb_add_pcie_port(struct amd_mdb_pcie *pcie,
406431
struct platform_device *pdev)
407432
{
@@ -426,6 +451,12 @@ static int amd_mdb_add_pcie_port(struct amd_mdb_pcie *pcie,
426451

427452
pp->ops = &amd_mdb_pcie_host_ops;
428453

454+
if (pcie->perst_gpio) {
455+
mdelay(PCIE_T_PVPERL_MS);
456+
gpiod_set_value_cansleep(pcie->perst_gpio, 0);
457+
mdelay(PCIE_RESET_CONFIG_WAIT_MS);
458+
}
459+
429460
err = dw_pcie_host_init(pp);
430461
if (err) {
431462
dev_err(dev, "Failed to initialize host, err=%d\n", err);
@@ -444,6 +475,7 @@ static int amd_mdb_pcie_probe(struct platform_device *pdev)
444475
struct device *dev = &pdev->dev;
445476
struct amd_mdb_pcie *pcie;
446477
struct dw_pcie *pci;
478+
int ret;
447479

448480
pcie = devm_kzalloc(dev, sizeof(*pcie), GFP_KERNEL);
449481
if (!pcie)
@@ -454,6 +486,24 @@ static int amd_mdb_pcie_probe(struct platform_device *pdev)
454486

455487
platform_set_drvdata(pdev, pcie);
456488

489+
ret = amd_mdb_parse_pcie_port(pcie);
490+
/*
491+
* If amd_mdb_parse_pcie_port returns -ENODEV, it indicates that the
492+
* PCIe Bridge node was not found in the device tree. This is not
493+
* considered a fatal error and will trigger a fallback where the
494+
* reset GPIO is acquired directly from the PCIe Host Bridge node.
495+
*/
496+
if (ret) {
497+
if (ret != -ENODEV)
498+
return ret;
499+
500+
pcie->perst_gpio = devm_gpiod_get_optional(dev, "reset",
501+
GPIOD_OUT_HIGH);
502+
if (IS_ERR(pcie->perst_gpio))
503+
return dev_err_probe(dev, PTR_ERR(pcie->perst_gpio),
504+
"Failed to request reset GPIO\n");
505+
}
506+
457507
return amd_mdb_add_pcie_port(pcie, pdev);
458508
}
459509

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