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[FMV][AArch64] Expand feature dependencies using AArch64::ExtensionSet.
Currently we maintain a hand written list of subtarget features which we are implied for a given FMV feature. It is more robust to expand such dependencies using ExtensionDependency from TargetParser, since that is generated by tablegen. For this to work each FMV feature must have a corresponding SubtargetFeature in place. There are a few FMV features which don't satisfy this criteria. We are reviewing them in the ACLE specification. I have also added the missing dependences: * FEAT_DPB2 -> FEAT_DPB * FEAT_FlagM2 -> FEAT_FlagM Blocked on ARM-software/acle#315
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11 files changed

+144
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‎clang/lib/AST/ASTContext.cpp‎

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14251,10 +14251,12 @@ QualType ASTContext::getCorrespondingSignedFixedPointType(QualType Ty) const {
1425114251
static std::vector<std::string> getFMVBackendFeaturesFor(
1425214252
const llvm::SmallVectorImpl<StringRef> &FMVFeatStrings) {
1425314253
std::vector<std::string> BackendFeats;
14254+
llvm::AArch64::ExtensionSet FeatureBits;
1425414255
for (StringRef F : FMVFeatStrings)
1425514256
if (auto FMVExt = llvm::AArch64::parseFMVExtension(F))
14256-
for (StringRef F : FMVExt->getImpliedFeatures())
14257-
BackendFeats.push_back(F.str());
14257+
if (FMVExt->ID)
14258+
FeatureBits.enable(*FMVExt->ID);
14259+
FeatureBits.toLLVMFeatureList(BackendFeats);
1425814260
return BackendFeats;
1425914261
}
1426014262

‎clang/lib/Basic/Targets/AArch64.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -722,7 +722,7 @@ unsigned AArch64TargetInfo::multiVersionFeatureCost() const {
722722
bool AArch64TargetInfo::doesFeatureAffectCodeGen(StringRef Name) const {
723723
// FMV extensions which imply no backend features do not affect codegen.
724724
if (auto Ext = llvm::AArch64::parseFMVExtension(Name))
725-
return !Ext->Features.empty();
725+
return Ext->ID.has_value();
726726
return false;
727727
}
728728

‎clang/test/CodeGen/aarch64-fmv-dependencies.c‎

Lines changed: 23 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -3,10 +3,10 @@
33

44
// RUN: %clang --target=aarch64-linux-gnu --rtlib=compiler-rt -emit-llvm -S -o - %s | FileCheck %s
55

6-
// CHECK: define dso_local i32 @fmv._Maes() #[[ATTR0:[0-9]+]] {
6+
// CHECK: define dso_local i32 @fmv._Maes() #[[aes:[0-9]+]] {
77
__attribute__((target_version("aes"))) int fmv(void) { return 0; }
88

9-
// CHECK: define dso_local i32 @fmv._Mbf16() #[[bf16_ebf16:[0-9]+]] {
9+
// CHECK: define dso_local i32 @fmv._Mbf16() #[[bf16:[0-9]+]] {
1010
__attribute__((target_version("bf16"))) int fmv(void) { return 0; }
1111

1212
// CHECK: define dso_local i32 @fmv._Mbti() #[[bti:[0-9]+]] {
@@ -15,7 +15,7 @@ __attribute__((target_version("bti"))) int fmv(void) { return 0; }
1515
// CHECK: define dso_local i32 @fmv._Mcrc() #[[crc:[0-9]+]] {
1616
__attribute__((target_version("crc"))) int fmv(void) { return 0; }
1717

18-
// CHECK: define dso_local i32 @fmv._Mdgh() #[[ATTR0:[0-9]+]] {
18+
// CHECK: define dso_local i32 @fmv._Mdgh() #[[default:[0-9]+]] {
1919
__attribute__((target_version("dgh"))) int fmv(void) { return 0; }
2020

2121
// CHECK: define dso_local i32 @fmv._Mdit() #[[dit:[0-9]+]] {
@@ -30,7 +30,7 @@ __attribute__((target_version("dpb"))) int fmv(void) { return 0; }
3030
// CHECK: define dso_local i32 @fmv._Mdpb2() #[[dpb2:[0-9]+]] {
3131
__attribute__((target_version("dpb2"))) int fmv(void) { return 0; }
3232

33-
// CHECK: define dso_local i32 @fmv._Mebf16() #[[bf16_ebf16:[0-9]+]] {
33+
// CHECK: define dso_local i32 @fmv._Mebf16() #[[default]] {
3434
__attribute__((target_version("ebf16"))) int fmv(void) { return 0; }
3535

3636
// CHECK: define dso_local i32 @fmv._Mf32mm() #[[f32mm:[0-9]+]] {
@@ -48,7 +48,7 @@ __attribute__((target_version("flagm"))) int fmv(void) { return 0; }
4848
// CHECK: define dso_local i32 @fmv._Mflagm2() #[[flagm2:[0-9]+]] {
4949
__attribute__((target_version("flagm2"))) int fmv(void) { return 0; }
5050

51-
// CHECK: define dso_local i32 @fmv._Mfp() #[[ATTR0:[0-9]+]] {
51+
// CHECK: define dso_local i32 @fmv._Mfp() #[[default]] {
5252
__attribute__((target_version("fp"))) int fmv(void) { return 0; }
5353

5454
// CHECK: define dso_local i32 @fmv._Mfp16() #[[fp16:[0-9]+]] {
@@ -75,13 +75,13 @@ __attribute__((target_version("lse"))) int fmv(void) { return 0; }
7575
// CHECK: define dso_local i32 @fmv._Mmemtag() #[[memtag:[0-9]+]] {
7676
__attribute__((target_version("memtag"))) int fmv(void) { return 0; }
7777

78-
// CHECK: define dso_local i32 @fmv._Mmemtag3() #[[memtag:[0-9]+]] {
78+
// CHECK: define dso_local i32 @fmv._Mmemtag3() #[[default]] {
7979
__attribute__((target_version("memtag3"))) int fmv(void) { return 0; }
8080

8181
// CHECK: define dso_local i32 @fmv._Mmops() #[[mops:[0-9]+]] {
8282
__attribute__((target_version("mops"))) int fmv(void) { return 0; }
8383

84-
// CHECK: define dso_local i32 @fmv._Mpmull() #[[pmull:[0-9]+]] {
84+
// CHECK: define dso_local i32 @fmv._Mpmull() #[[default]] {
8585
__attribute__((target_version("pmull"))) int fmv(void) { return 0; }
8686

8787
// CHECK: define dso_local i32 @fmv._Mpredres() #[[predres:[0-9]+]] {
@@ -90,7 +90,7 @@ __attribute__((target_version("predres"))) int fmv(void) { return 0; }
9090
// CHECK: define dso_local i32 @fmv._Mrcpc() #[[rcpc:[0-9]+]] {
9191
__attribute__((target_version("rcpc"))) int fmv(void) { return 0; }
9292

93-
// CHECK: define dso_local i32 @fmv._Mrcpc2() #[[rcpc:[0-9]+]] {
93+
// CHECK: define dso_local i32 @fmv._Mrcpc2() #[[rcpc2:[0-9]+]] {
9494
__attribute__((target_version("rcpc2"))) int fmv(void) { return 0; }
9595

9696
// CHECK: define dso_local i32 @fmv._Mrcpc3() #[[rcpc3:[0-9]+]] {
@@ -102,7 +102,7 @@ __attribute__((target_version("rdm"))) int fmv(void) { return 0; }
102102
// CHECK: define dso_local i32 @fmv._Mrng() #[[rng:[0-9]+]] {
103103
__attribute__((target_version("rng"))) int fmv(void) { return 0; }
104104

105-
// CHECK: define dso_local i32 @fmv._Mrpres() #[[ATTR0:[0-9]+]] {
105+
// CHECK: define dso_local i32 @fmv._Mrpres() #[[default]] {
106106
__attribute__((target_version("rpres"))) int fmv(void) { return 0; }
107107

108108
// CHECK: define dso_local i32 @fmv._Msb() #[[sb:[0-9]+]] {
@@ -114,7 +114,7 @@ __attribute__((target_version("sha2"))) int fmv(void) { return 0; }
114114
// CHECK: define dso_local i32 @fmv._Msha3() #[[sha3:[0-9]+]] {
115115
__attribute__((target_version("sha3"))) int fmv(void) { return 0; }
116116

117-
// CHECK: define dso_local i32 @fmv._Msimd() #[[ATTR0:[0-9]+]] {
117+
// CHECK: define dso_local i32 @fmv._Msimd() #[[default]] {
118118
__attribute__((target_version("simd"))) int fmv(void) { return 0; }
119119

120120
// CHECK: define dso_local i32 @fmv._Msm4() #[[sm4:[0-9]+]] {
@@ -138,25 +138,25 @@ __attribute__((target_version("ssbs"))) int fmv(void) { return 0; }
138138
// CHECK: define dso_local i32 @fmv._Msve() #[[sve:[0-9]+]] {
139139
__attribute__((target_version("sve"))) int fmv(void) { return 0; }
140140

141-
// CHECK: define dso_local i32 @fmv._Msve-bf16() #[[sve_bf16_ebf16:[0-9]+]] {
141+
// CHECK: define dso_local i32 @fmv._Msve-bf16() #[[default]] {
142142
__attribute__((target_version("sve-bf16"))) int fmv(void) { return 0; }
143143

144-
// CHECK: define dso_local i32 @fmv._Msve-ebf16() #[[sve_bf16_ebf16:[0-9]+]] {
144+
// CHECK: define dso_local i32 @fmv._Msve-ebf16() #[[default]] {
145145
__attribute__((target_version("sve-ebf16"))) int fmv(void) { return 0; }
146146

147-
// CHECK: define dso_local i32 @fmv._Msve-i8mm() #[[sve_i8mm:[0-9]+]] {
147+
// CHECK: define dso_local i32 @fmv._Msve-i8mm() #[[default]] {
148148
__attribute__((target_version("sve-i8mm"))) int fmv(void) { return 0; }
149149

150150
// CHECK: define dso_local i32 @fmv._Msve2() #[[sve2:[0-9]+]] {
151151
__attribute__((target_version("sve2"))) int fmv(void) { return 0; }
152152

153-
// CHECK: define dso_local i32 @fmv._Msve2-aes() #[[sve2_aes_sve2_pmull128:[0-9]+]] {
153+
// CHECK: define dso_local i32 @fmv._Msve2-aes() #[[sve2_aes:[0-9]+]] {
154154
__attribute__((target_version("sve2-aes"))) int fmv(void) { return 0; }
155155

156156
// CHECK: define dso_local i32 @fmv._Msve2-bitperm() #[[sve2_bitperm:[0-9]+]] {
157157
__attribute__((target_version("sve2-bitperm"))) int fmv(void) { return 0; }
158158

159-
// CHECK: define dso_local i32 @fmv._Msve2-pmull128() #[[sve2_aes_sve2_pmull128:[0-9]+]] {
159+
// CHECK: define dso_local i32 @fmv._Msve2-pmull128() #[[default]] {
160160
__attribute__((target_version("sve2-pmull128"))) int fmv(void) { return 0; }
161161

162162
// CHECK: define dso_local i32 @fmv._Msve2-sha3() #[[sve2_sha3:[0-9]+]] {
@@ -177,10 +177,11 @@ int caller() {
177177
return fmv();
178178
}
179179

180-
// CHECK: attributes #[[ATTR0]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+v8a"
181-
// CHECK: attributes #[[bf16_ebf16]] = { {{.*}} "target-features"="+bf16,+fp-armv8,+neon,+outline-atomics,+v8a"
180+
// CHECK: attributes #[[aes]] = { {{.*}} "target-features"="+aes,+fp-armv8,+neon,+outline-atomics,+v8a"
181+
// CHECK: attributes #[[bf16]] = { {{.*}} "target-features"="+bf16,+fp-armv8,+neon,+outline-atomics,+v8a"
182182
// CHECK: attributes #[[bti]] = { {{.*}} "target-features"="+bti,+fp-armv8,+neon,+outline-atomics,+v8a"
183183
// CHECK: attributes #[[crc]] = { {{.*}} "target-features"="+crc,+fp-armv8,+neon,+outline-atomics,+v8a"
184+
// CHECK: attributes #[[default]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+v8a"
184185
// CHECK: attributes #[[dit]] = { {{.*}} "target-features"="+dit,+fp-armv8,+neon,+outline-atomics,+v8a"
185186
// CHECK: attributes #[[dotprod]] = { {{.*}} "target-features"="+dotprod,+fp-armv8,+neon,+outline-atomics,+v8a"
186187
// CHECK: attributes #[[dpb]] = { {{.*}} "target-features"="+ccpp,+fp-armv8,+neon,+outline-atomics,+v8a"
@@ -199,10 +200,10 @@ int caller() {
199200
// CHECK: attributes #[[lse]] = { {{.*}} "target-features"="+fp-armv8,+lse,+neon,+outline-atomics,+v8a"
200201
// CHECK: attributes #[[memtag]] = { {{.*}} "target-features"="+fp-armv8,+mte,+neon,+outline-atomics,+v8a"
201202
// CHECK: attributes #[[mops]] = { {{.*}} "target-features"="+fp-armv8,+mops,+neon,+outline-atomics,+v8a"
202-
// CHECK: attributes #[[pmull]] = { {{.*}} "target-features"="+aes,+fp-armv8,+neon,+outline-atomics,+v8a"
203203
// CHECK: attributes #[[predres]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+predres,+v8a"
204204
// CHECK: attributes #[[rcpc]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+rcpc,+v8a"
205-
// CHECK: attributes #[[rcpc3]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+rcpc,+rcpc3,+v8a"
205+
// CHECK: attributes #[[rcpc2]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+rcpc,+rcpc-immo,+v8a"
206+
// CHECK: attributes #[[rcpc3]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+rcpc,+rcpc-immo,+rcpc3,+v8a"
206207
// CHECK: attributes #[[rdm]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+rdm,+v8a"
207208
// CHECK: attributes #[[rng]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+rand,+v8a"
208209
// CHECK: attributes #[[sb]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+sb,+v8a"
@@ -215,11 +216,9 @@ int caller() {
215216
// CHECK: attributes #[[sme2]] = { {{.*}} "target-features"="+bf16,+fp-armv8,+neon,+outline-atomics,+sme,+sme2,+v8a"
216217
// CHECK: attributes #[[ssbs]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+ssbs,+v8a"
217218
// CHECK: attributes #[[sve]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+v8a"
218-
// CHECK: attributes #[[sve_bf16_ebf16]] = { {{.*}} "target-features"="+bf16,+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+v8a"
219-
// CHECK: attributes #[[sve_i8mm]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+i8mm,+neon,+outline-atomics,+sve,+v8a"
220219
// CHECK: attributes #[[sve2]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+v8a"
221-
// CHECK: attributes #[[sve2_aes_sve2_pmull128]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-aes,+v8a"
220+
// CHECK: attributes #[[sve2_aes]] = { {{.*}} "target-features"="+aes,+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-aes,+v8a"
222221
// CHECK: attributes #[[sve2_bitperm]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-bitperm,+v8a"
223-
// CHECK: attributes #[[sve2_sha3]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-sha3,+v8a"
224-
// CHECK: attributes #[[sve2_sm4]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sve,+sve2,+sve2-sm4,+v8a"
222+
// CHECK: attributes #[[sve2_sha3]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sha2,+sha3,+sve,+sve2,+sve2-sha3,+v8a"
223+
// CHECK: attributes #[[sve2_sm4]] = { {{.*}} "target-features"="+fp-armv8,+fullfp16,+neon,+outline-atomics,+sm4,+sve,+sve2,+sve2-sm4,+v8a"
225224
// CHECK: attributes #[[wfxt]] = { {{.*}} "target-features"="+fp-armv8,+neon,+outline-atomics,+v8a,+wfxt"

‎clang/test/CodeGen/aarch64-targetattr.c‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -210,8 +210,8 @@ void applem4() {}
210210
// CHECK: attributes #[[ATTR7]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "tune-cpu"="generic" }
211211
// CHECK: attributes #[[ATTR8]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-n1" "target-features"="+aes,+crc,+dotprod,+fp-armv8,+fullfp16,+lse,+neon,+perfmon,+ras,+rcpc,+rdm,+sha2,+spe,+ssbs,+v8.1a,+v8.2a,+v8a" "tune-cpu"="cortex-a710" }
212212
// CHECK: attributes #[[ATTR9]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+sve" "tune-cpu"="cortex-a710" }
213-
// CHECK: attributes #[[ATTR10]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v1" "target-features"="+aes,+bf16,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+perfmon,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a" }
214-
// CHECK: attributes #[[ATTR11]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v1" "target-features"="+aes,+bf16,+ccdp,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+perfmon,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,-sve" }
213+
// CHECK: attributes #[[ATTR10]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v1" "target-features"="+aes,+bf16,+ccdp,+ccidx,+ccpp,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+perfmon,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a" }
214+
// CHECK: attributes #[[ATTR11]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-v1" "target-features"="+aes,+bf16,+ccdp,+ccidx,+ccpp,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fp16fml,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+perfmon,+rand,+ras,+rcpc,+rdm,+sha2,+sha3,+sm4,+spe,+ssbs,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8a,-sve" }
215215
// CHECK: attributes #[[ATTR12]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16,+sve" }
216216
// CHECK: attributes #[[ATTR13]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+fp-armv8,+fullfp16" }
217217
// CHECK: attributes #[[ATTR14]] = { noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-cpu"="neoverse-n1" "target-features"="+aes,+bf16,+bti,+ccidx,+complxnum,+crc,+dit,+dotprod,+flagm,+fp-armv8,+fullfp16,+i8mm,+jsconv,+lse,+neon,+pauth,+perfmon,+predres,+ras,+rcpc,+rdm,+sb,+sha2,+spe,+ssbs,+sve,+sve2,+v8.1a,+v8.2a,+v8.3a,+v8.4a,+v8.5a,+v8.6a,+v8a" "tune-cpu"="cortex-a710" }

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