Skip to content

Commit d028eaa

Browse files
jthackrayjthackray
authored
[AArch64] Update SVE untyped intrinsics to have FP8 variants (llvm#123585)
Update the following intrinsics to have FP8 variants: ``` c svuint8_t svdup_laneq[_u8](svuint8_t zn, uint64_t imm_idx); svuint8_t svextq[_u8](svuint8_t zdn, svuint8_t zm, uint64_t imm); svint8_t svtblq[_s8](svint8_t zn, svuint8_t zm); svint8_t svtbxq[_s8](svint8_t fallback, svint8_t zn, svuint8_t zm); svuint8_t svuzpq1[_u8](svuint8_t zn, svuint8_t zm); svuint8_t svuzpq2[_u8](svuint8_t zn, svuint8_t zm); svuint8_t svzipq1[_u8](svuint8_t zn, svuint8_t zm); svuint8_t svzipq2[_u8](svuint8_t zn, svuint8_t zm); ```
1 parent 3365693 commit d028eaa

File tree

10 files changed

+133
-12
lines changed

10 files changed

+133
-12
lines changed

‎clang/include/clang/Basic/arm_sve.td‎

Lines changed: 8 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -2280,15 +2280,15 @@ let SVETargetGuard = "sve2p1", SMETargetGuard = "sme2" in {
22802280

22812281
let SVETargetGuard = "sve2p1", SMETargetGuard = InvalidMode in {
22822282
// ZIPQ1, ZIPQ2, UZPQ1, UZPQ2
2283-
def SVZIPQ1 : SInst<"svzipq1[_{d}]", "ddd", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_zipq1", [], []>;
2284-
def SVZIPQ2 : SInst<"svzipq2[_{d}]", "ddd", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_zipq2", [], []>;
2285-
def SVUZPQ1 : SInst<"svuzpq1[_{d}]", "ddd", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_uzpq1", [], []>;
2286-
def SVUZPQ2 : SInst<"svuzpq2[_{d}]", "ddd", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_uzpq2", [], []>;
2283+
def SVZIPQ1 : SInst<"svzipq1[_{d}]", "ddd", "cUcsUsiUilUlbhfdm", MergeNone, "aarch64_sve_zipq1", [], []>;
2284+
def SVZIPQ2 : SInst<"svzipq2[_{d}]", "ddd", "cUcsUsiUilUlbhfdm", MergeNone, "aarch64_sve_zipq2", [], []>;
2285+
def SVUZPQ1 : SInst<"svuzpq1[_{d}]", "ddd", "cUcsUsiUilUlbhfdm", MergeNone, "aarch64_sve_uzpq1", [], []>;
2286+
def SVUZPQ2 : SInst<"svuzpq2[_{d}]", "ddd", "cUcsUsiUilUlbhfdm", MergeNone, "aarch64_sve_uzpq2", [], []>;
22872287
// TBLQ, TBXQ
2288-
def SVTBLQ : SInst<"svtblq[_{d}]", "ddu", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_tblq">;
2289-
def SVTBXQ : SInst<"svtbxq[_{d}]", "dddu", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_tbxq">;
2288+
def SVTBLQ : SInst<"svtblq[_{d}]", "ddu", "cUcsUsiUilUlbhfdm", MergeNone, "aarch64_sve_tblq">;
2289+
def SVTBXQ : SInst<"svtbxq[_{d}]", "dddu", "cUcsUsiUilUlbhfdm", MergeNone, "aarch64_sve_tbxq">;
22902290
// EXTQ
2291-
def EXTQ : SInst<"svextq[_{d}]", "dddk", "cUcsUsiUilUlbhfd", MergeNone, "aarch64_sve_extq", [], [ImmCheck<2, ImmCheckLaneIndex, 0>]>;
2291+
def EXTQ : SInst<"svextq[_{d}]", "dddk", "cUcsUsiUilUlbhfdm", MergeNone, "aarch64_sve_extq", [], [ImmCheck<2, ImmCheckLaneIndex, 0>]>;
22922292

22932293
// PMOV
22942294
// Move to Pred
@@ -2314,7 +2314,7 @@ let SVETargetGuard = "sve2p1", SMETargetGuard = InvalidMode in {
23142314

23152315
let SVETargetGuard = "sve2p1", SMETargetGuard = "sme2p1" in {
23162316
// DUPQ
2317-
def SVDUP_LANEQ_B : SInst<"svdup_laneq[_{d}]", "ddi", "cUc", MergeNone, "aarch64_sve_dup_laneq", [VerifyRuntimeMode], [ImmCheck<1, ImmCheck0_15>]>;
2317+
def SVDUP_LANEQ_B : SInst<"svdup_laneq[_{d}]", "ddi", "cUcm", MergeNone, "aarch64_sve_dup_laneq", [VerifyRuntimeMode], [ImmCheck<1, ImmCheck0_15>]>;
23182318
def SVDUP_LANEQ_H : SInst<"svdup_laneq[_{d}]", "ddi", "sUsh", MergeNone, "aarch64_sve_dup_laneq", [VerifyRuntimeMode], [ImmCheck<1, ImmCheck0_7>]>;
23192319
def SVDUP_LANEQ_S : SInst<"svdup_laneq[_{d}]", "ddi", "iUif", MergeNone, "aarch64_sve_dup_laneq", [VerifyRuntimeMode], [ImmCheck<1, ImmCheck0_3>]>;
23202320
def SVDUP_LANEQ_D : SInst<"svdup_laneq[_{d}]", "ddi", "lUld", MergeNone, "aarch64_sve_dup_laneq", [VerifyRuntimeMode], [ImmCheck<1, ImmCheck0_1>]>;

‎clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_dupq.c‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -211,3 +211,19 @@ svfloat64_t test_svdup_laneq_f64(svfloat64_t zn) {
211211
svbfloat16_t test_svdup_laneq_bf16(svbfloat16_t zn) {
212212
return SVE_ACLE_FUNC(svdup_laneq, _bf16)(zn, 3);
213213
}
214+
215+
// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svdup_laneq_mf8
216+
// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]]) #[[ATTR0]] {
217+
// CHECK-NEXT: entry:
218+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.laneq.nxv16i8(<vscale x 16 x i8> [[ZN]], i32 1)
219+
// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
220+
//
221+
// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z20test_svdup_laneq_mf8u13__SVMfloat8_t
222+
// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]]) #[[ATTR0]] {
223+
// CPP-CHECK-NEXT: entry:
224+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.dup.laneq.nxv16i8(<vscale x 16 x i8> [[ZN]], i32 1)
225+
// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
226+
//
227+
svmfloat8_t test_svdup_laneq_mf8(svmfloat8_t zn) {
228+
return SVE_ACLE_FUNC(svdup_laneq, _mf8)(zn, 1);
229+
}

‎clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_extq.c‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -211,3 +211,19 @@ svfloat64_t test_svextq_f64(svfloat64_t zn, svfloat64_t zm) {
211211
svbfloat16_t test_svextq_bf16(svbfloat16_t zn, svbfloat16_t zm) {
212212
return SVE_ACLE_FUNC(svextq, _bf16,,)(zn, zm, 6);
213213
}
214+
215+
// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svextq_mf8
216+
// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {
217+
// CHECK-NEXT: entry:
218+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.extq.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]], i32 6)
219+
// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
220+
//
221+
// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z15test_svextq_mf8u13__SVMfloat8_tS_
222+
// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {
223+
// CPP-CHECK-NEXT: entry:
224+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.extq.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]], i32 6)
225+
// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
226+
//
227+
svmfloat8_t test_svextq_mf8(svmfloat8_t zn, svmfloat8_t zm) {
228+
return SVE_ACLE_FUNC(svextq, _mf8,,)(zn, zm, 6);
229+
}

‎clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tblq.c‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -212,3 +212,19 @@ svfloat64_t test_svtblq_f64(svfloat64_t zn, svuint64_t zm) {
212212
svbfloat16_t test_svtblq_bf16(svbfloat16_t zn, svuint16_t zm) {
213213
return SVE_ACLE_FUNC(svtblq, _bf16,,)(zn, zm);
214214
}
215+
216+
// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svtblq_mf8
217+
// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {
218+
// CHECK-NEXT: entry:
219+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.tblq.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
220+
// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
221+
//
222+
// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z15test_svtblq_mf8u13__SVMfloat8_tu11__SVUint8_t
223+
// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {
224+
// CPP-CHECK-NEXT: entry:
225+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.tblq.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
226+
// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
227+
//
228+
svmfloat8_t test_svtblq_mf8(svmfloat8_t zn, svuint8_t zm) {
229+
return SVE_ACLE_FUNC(svtblq, _mf8,,)(zn, zm);
230+
}

‎clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_tbxq.c‎

Lines changed: 16 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -212,3 +212,19 @@ svfloat64_t test_svtbxq_f64(svfloat64_t passthru, svfloat64_t zn, svuint64_t zm)
212212
svbfloat16_t test_svtbxq_bf16(svbfloat16_t passthru, svbfloat16_t zn, svuint16_t zm) {
213213
return SVE_ACLE_FUNC(svtbxq, _bf16,,)(passthru, zn, zm);
214214
}
215+
216+
// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svtbxq_mf8
217+
// CHECK-SAME: (<vscale x 16 x i8> [[PASSTHRU:%.*]], <vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {
218+
// CHECK-NEXT: entry:
219+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.tbxq.nxv16i8(<vscale x 16 x i8> [[PASSTHRU]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
220+
// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
221+
//
222+
// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z15test_svtbxq_mf8u13__SVMfloat8_tS_u11__SVUint8_t
223+
// CPP-CHECK-SAME: (<vscale x 16 x i8> [[PASSTHRU:%.*]], <vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {
224+
// CPP-CHECK-NEXT: entry:
225+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.tbxq.nxv16i8(<vscale x 16 x i8> [[PASSTHRU]], <vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
226+
// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
227+
//
228+
svmfloat8_t test_svtbxq_mf8(svmfloat8_t passthru, svmfloat8_t zn, svuint8_t zm) {
229+
return SVE_ACLE_FUNC(svtbxq, _mf8,,)(passthru, zn, zm);
230+
}

‎clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq1.c‎

Lines changed: 15 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -214,4 +214,19 @@ svbfloat16_t test_svuzpq1_bf16(svbfloat16_t zn, svbfloat16_t zm) {
214214
return SVE_ACLE_FUNC(svuzpq1,_bf16)(zn, zm);
215215
}
216216

217+
// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svuzpq1_mf8
218+
// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {
219+
// CHECK-NEXT: entry:
220+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uzpq1.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
221+
// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
222+
//
223+
// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z16test_svuzpq1_mf8u13__SVMfloat8_tS_
224+
// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {
225+
// CPP-CHECK-NEXT: entry:
226+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uzpq1.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
227+
// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
228+
//
229+
svmfloat8_t test_svuzpq1_mf8(svmfloat8_t zn, svmfloat8_t zm) {
230+
return SVE_ACLE_FUNC(svuzpq1,_mf8)(zn, zm);
231+
}
217232

‎clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_uzpq2.c‎

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -214,4 +214,18 @@ svbfloat16_t test_svuzpq2_bf16(svbfloat16_t zn, svbfloat16_t zm) {
214214
return SVE_ACLE_FUNC(svuzpq2,_bf16)(zn, zm);
215215
}
216216

217-
217+
// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svuzpq2_mf8
218+
// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {
219+
// CHECK-NEXT: entry:
220+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uzpq2.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
221+
// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
222+
//
223+
// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z16test_svuzpq2_mf8u13__SVMfloat8_tS_
224+
// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {
225+
// CPP-CHECK-NEXT: entry:
226+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.uzpq2.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
227+
// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
228+
//
229+
svmfloat8_t test_svuzpq2_mf8(svmfloat8_t zn, svmfloat8_t zm) {
230+
return SVE_ACLE_FUNC(svuzpq2,_mf8)(zn, zm);
231+
}

‎clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq1.c‎

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -214,4 +214,18 @@ svbfloat16_t test_svzipq1_bf16(svbfloat16_t zn, svbfloat16_t zm) {
214214
return SVE_ACLE_FUNC(svzipq1,_bf16)(zn, zm);
215215
}
216216

217-
217+
// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svzipq1_mf8
218+
// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {
219+
// CHECK-NEXT: entry:
220+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.zipq1.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
221+
// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
222+
//
223+
// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z16test_svzipq1_mf8u13__SVMfloat8_tS_
224+
// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {
225+
// CPP-CHECK-NEXT: entry:
226+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.zipq1.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
227+
// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
228+
//
229+
svmfloat8_t test_svzipq1_mf8(svmfloat8_t zn, svmfloat8_t zm) {
230+
return SVE_ACLE_FUNC(svzipq1,_mf8)(zn, zm);
231+
}

‎clang/test/CodeGen/AArch64/sve2p1-intrinsics/acle_sve2p1_zipq2.c‎

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -214,4 +214,18 @@ svbfloat16_t test_svzipq2_bf16(svbfloat16_t zn, svbfloat16_t zm) {
214214
return SVE_ACLE_FUNC(svzipq2,_bf16)(zn, zm);
215215
}
216216

217-
217+
// CHECK-LABEL: define dso_local <vscale x 16 x i8> @test_svzipq2_mf8
218+
// CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {
219+
// CHECK-NEXT: entry:
220+
// CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.zipq2.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
221+
// CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
222+
//
223+
// CPP-CHECK-LABEL: define dso_local <vscale x 16 x i8> @_Z16test_svzipq2_mf8u13__SVMfloat8_tS_
224+
// CPP-CHECK-SAME: (<vscale x 16 x i8> [[ZN:%.*]], <vscale x 16 x i8> [[ZM:%.*]]) #[[ATTR0]] {
225+
// CPP-CHECK-NEXT: entry:
226+
// CPP-CHECK-NEXT: [[TMP0:%.*]] = tail call <vscale x 16 x i8> @llvm.aarch64.sve.zipq2.nxv16i8(<vscale x 16 x i8> [[ZN]], <vscale x 16 x i8> [[ZM]])
227+
// CPP-CHECK-NEXT: ret <vscale x 16 x i8> [[TMP0]]
228+
//
229+
svmfloat8_t test_svzipq2_mf8(svmfloat8_t zn, svmfloat8_t zm) {
230+
return SVE_ACLE_FUNC(svzipq2,_mf8)(zn, zm);
231+
}

‎clang/utils/TableGen/SveEmitter.cpp‎

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1050,7 +1050,7 @@ std::string Intrinsic::replaceTemplatedArgs(std::string Name, TypeSpec TS,
10501050
else if (T.isBFloat())
10511051
TypeCode = "bf";
10521052
else if (T.isMFloat())
1053-
TypeCode = "mfp";
1053+
TypeCode = "mf";
10541054
else
10551055
TypeCode = 'f';
10561056
Ret.replace(Pos, NumChars, TypeCode + utostr(T.getElementSizeInBits()));

0 commit comments

Comments
 (0)