2323#define OUTPUT_WIDTH 16
2424// mask which bits we are using
2525uint32_t output_mask = ((1 << OUTPUT_WIDTH ) - 1 ) << OUTPUT_PIN_BASE ;
26+ // command type enum
27+ enum COMMAND {
28+ BUFFERED_HWSTART = 3 << OUTPUT_WIDTH ,
29+ BUFFERED = 1 << OUTPUT_WIDTH ,
30+ MANUAL = 0
31+ };
2632
2733#define MAX_DO_CMDS 60000
2834// two DO CMDS per INSTRUCTION
@@ -188,9 +194,9 @@ void core1_entry() {
188194 // wait for message from main core
189195 uint32_t command = multicore_fifo_pop_blocking ();
190196
191- if (command == 0 || command == 1 ){
197+ if (command & BUFFERED ){
192198 // buffered execution
193- uint32_t hwstart = command ;
199+ uint32_t hwstart = ( command & BUFFERED_HWSTART ) ;
194200
195201 set_status (TRANSITION_TO_RUNNING );
196202 if (debug ){
@@ -242,7 +248,7 @@ void core1_entry() {
242248 }
243249 else {
244250 // manual update
245- uint32_t manual_state = command >> 1 ;
251+ uint32_t manual_state = command ;
246252 // put new state into the TX FIFO
247253 pio_sm_put_blocking (pio , sm , manual_state );
248254 // pull FIFO into scratch register and update pins
@@ -343,12 +349,12 @@ int main(){
343349 }
344350 // Run command: start state machine
345351 else if (strncmp (serial_buf , "run" , 3 ) == 0 ){
346- multicore_fifo_push_blocking (1 );
352+ multicore_fifo_push_blocking (BUFFERED_HWSTART );
347353 fast_serial_printf ("ok\r\n" );
348354 }
349355 // Software start: start state machine without waiting for trigger
350356 else if (strncmp (serial_buf , "swr" , 3 ) == 0 ){
351- multicore_fifo_push_blocking (0 );
357+ multicore_fifo_push_blocking (BUFFERED );
352358 fast_serial_printf ("ok\r\n" );
353359 }
354360 // Manual update of outputs
@@ -360,7 +366,7 @@ int main(){
360366 }
361367 else {
362368 // bit-shift state up by one to signal manual update
363- multicore_fifo_push_blocking (manual_state << 1 );
369+ multicore_fifo_push_blocking (manual_state );
364370 fast_serial_printf ("ok\r\n" );
365371 }
366372 }
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